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authorMatt Arsenault <Matthew.Arsenault@amd.com>2025-01-28 11:17:10 +0700
committerGitHub <noreply@github.com>2025-01-28 11:17:10 +0700
commitcc97653d534e80745a0cfb0143972e8d4dec9f74 (patch)
treeb238f4a5f5b352cf8b6db7cdc92cb633007df00b /llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
parent334a1cdbfaafc5424c5932663728334d1cc46285 (diff)
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AMDGPU: Custom lower 32-bit element shuffles (#123711)
This is so we can try to make use of v_pk_mov_b32 when available. Note this currently has little observable effect. The combiner will undo the common extract of shuffle pattern. The lack of test changes should demonstrate this change is minimally correct. We should probably try to make better use of wider extracts in even aligned cases, but I'm trying to avoid some really ugly regalloc regressions in some MFMA tests. The DAG scheduler ends up doing a worse job if we use vector extracts, resulting in failure to do 3 address conversion of MFMAs.
Diffstat (limited to 'llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp')
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