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author | Brox Chen <guochen2@amd.com> | 2025-03-12 20:58:19 -0400 |
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committer | GitHub <noreply@github.com> | 2025-03-13 07:58:19 +0700 |
commit | cb73271be12a40c7d885813733e11fd90eb3ed10 (patch) | |
tree | 7c8d105ff2145d9001c1a4c1c2c69ffb562925ee /llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp | |
parent | f4fc2d731c1b351d5f684f7ec53a0e1ca549df43 (diff) | |
download | llvm-cb73271be12a40c7d885813733e11fd90eb3ed10.zip llvm-cb73271be12a40c7d885813733e11fd90eb3ed10.tar.gz llvm-cb73271be12a40c7d885813733e11fd90eb3ed10.tar.bz2 |
[AMDGPU][CodeGen] use vt in VGPRimm pattern (#131016)
There seems to be a typo error introduced by
https://github.com/llvm/llvm-project/commit/2033767d68ed9aabcf1ad5d2bdd7541b272a05fd
Correct this pattern to use vt.
Diffstat (limited to 'llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp')
0 files changed, 0 insertions, 0 deletions