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author | Nikita Popov <npopov@redhat.com> | 2022-02-24 12:12:05 +0100 |
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committer | Nikita Popov <npopov@redhat.com> | 2022-02-24 12:14:31 +0100 |
commit | c7fe6f9c92d950eb3bf41d898f35442de63dd328 (patch) | |
tree | cd9fef53e4a54c3db0656acf72aa96467a2b943b /llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp | |
parent | a8b4b9104c8f7ab5edb8651a900e61279e8bf931 (diff) | |
download | llvm-c7fe6f9c92d950eb3bf41d898f35442de63dd328.zip llvm-c7fe6f9c92d950eb3bf41d898f35442de63dd328.tar.gz llvm-c7fe6f9c92d950eb3bf41d898f35442de63dd328.tar.bz2 |
Revert "[RISCV] add the MC layer support of Zfinx extension"
This reverts commit 7798ecca9c3db42241169d31fea4fb820ed01830.
As reported in https://reviews.llvm.org/D93298#3331641 and
following, this causes assertion failures with inline assembly.
Diffstat (limited to 'llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp')
-rw-r--r-- | llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp | 32 |
1 files changed, 0 insertions, 32 deletions
diff --git a/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp b/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp index 1894799..ff96b2b 100644 --- a/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp +++ b/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp @@ -161,17 +161,6 @@ static DecodeStatus DecodeGPRCRegisterClass(MCInst &Inst, uint64_t RegNo, return MCDisassembler::Success; } -static DecodeStatus DecodeGPRPF64RegisterClass(MCInst &Inst, uint64_t RegNo, - uint64_t Address, - const void *Decoder) { - if (RegNo >= 32 || RegNo & 1) - return MCDisassembler::Fail; - - MCRegister Reg = RISCV::X0 + RegNo; - Inst.addOperand(MCOperand::createReg(Reg)); - return MCDisassembler::Success; -} - static DecodeStatus DecodeVRRegisterClass(MCInst &Inst, uint64_t RegNo, uint64_t Address, const void *Decoder) { @@ -438,27 +427,6 @@ DecodeStatus RISCVDisassembler::getInstruction(MCInst &MI, uint64_t &Size, return MCDisassembler::Fail; } Insn = support::endian::read32le(Bytes.data()); - if (STI.getFeatureBits()[RISCV::FeatureStdExtZdinx] && - !STI.getFeatureBits()[RISCV::Feature64Bit]) { - LLVM_DEBUG(dbgs() << "Trying RV32Zdinx table (Double in Integer and" - "rv32)\n"); - Result = decodeInstruction(DecoderTableRV32Zdinx32, MI, Insn, Address, - this, STI); - if (Result != MCDisassembler::Fail) { - Size = 4; - return Result; - } - } - - if (STI.getFeatureBits()[RISCV::FeatureStdExtZfinx]) { - LLVM_DEBUG(dbgs() << "Trying RVZfinx table (Float in Integer):\n"); - Result = decodeInstruction(DecoderTableRVZfinx32, MI, Insn, Address, this, - STI); - if (Result != MCDisassembler::Fail) { - Size = 4; - return Result; - } - } LLVM_DEBUG(dbgs() << "Trying RISCV32 table :\n"); Result = decodeInstruction(DecoderTable32, MI, Insn, Address, this, STI); Size = 4; |