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| author | David Spickett <david.spickett@linaro.org> | 2023-06-05 17:02:46 +0000 |
|---|---|---|
| committer | David Spickett <david.spickett@linaro.org> | 2023-06-21 10:50:31 +0000 |
| commit | bcfe5a52a39dee6d50d5e2410863fc555d2f50a8 (patch) | |
| tree | dd1965a91aa2255f11b7b61b777e8de427e52106 /llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp | |
| parent | 6f7c9d1e176362d4e9af46b808c36d786d1fc96c (diff) | |
| download | llvm-bcfe5a52a39dee6d50d5e2410863fc555d2f50a8.zip llvm-bcfe5a52a39dee6d50d5e2410863fc555d2f50a8.tar.gz llvm-bcfe5a52a39dee6d50d5e2410863fc555d2f50a8.tar.bz2 | |
[lldb] Add register field tables to the "register info" command
This teaches DumpRegisterInfo to generate a table from the register
flags type. It just calls a method on RegisterFlags.
As such, the extra tests are minimal and only show that the intergration
works. Exhaustive formatting tests are done with RegisterFlags itself.
Example:
```
(lldb) register info cpsr
Name: cpsr
Size: 4 bytes (32 bits)
In sets: general (index 0)
| 31 | 30 | 29 | 28 | 27-26 | 25 | 24 | 23 | 22 | 21 | 20 | 19-13 | 12 | 11-10 | 9 | 8 | 7 | 6 | 5 | 4 | 3-2 | 1 | 0 |
|----|----|----|----|-------|-----|-----|-----|-----|----|----|-------|------|-------|---|---|---|---|---|-----|-----|---|----|
| N | Z | C | V | | TCO | DIT | UAO | PAN | SS | IL | | SSBS | | D | A | I | F | | nRW | EL | | SP |
```
LLDB limits the max terminal width to 80 chars by default.
So to get that full width output you will need to change the "term-width"
setting to something higher.
Reviewed By: jasonmolenda
Differential Revision: https://reviews.llvm.org/D152918
Diffstat (limited to 'llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp')
0 files changed, 0 insertions, 0 deletions