[RISCV] Fix the disassembler's handling of C.LUI when imm=0 (#133450)

Fix for #133446.

According to the RISC-V spec: "C.LUI is valid only when rd≠{x0,x2}, and
when the immediate is not equal to zero. The code points with imm=0 are
reserved".

This change makes the disassembler consider code points with imm=0 as
illegal. It introduces a test which exercises every C.LUI opcode
including the illegal ones but excluding those assigned to C.ADDI16SP).
Output for +c, +c +Zcmop, and +c +no-rvc-hints is checked.

1 files changed, 3 insertions, 2 deletions

diff --git a/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp b/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
index 15f9ea0..e2a98e8 100644
--- a/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
+++ b/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
@@ -453,9 +453,10 @@ static DecodeStatus decodeCLUIImmOperand(MCInst &Inst, uint32_t Imm,
                                          int64_t Address,
                                          const MCDisassembler *Decoder) {
   assert(isUInt<6>(Imm) && "Invalid immediate");
-  if (Imm > 31) {
+  if (Imm == 0)
+    return MCDisassembler::Fail;
+  if (Imm > 31)
     Imm = (SignExtend64<6>(Imm) & 0xfffff);
-  }
   Inst.addOperand(MCOperand::createImm(Imm));
   return MCDisassembler::Success;
 }