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| author | Denis Revunov <revunov.denis@huawei-partners.com> | 2023-01-18 09:15:25 -0500 |
|---|---|---|
| committer | Denis Revunov <revunov.denis@huawei-partners.com> | 2023-02-22 04:45:19 -0500 |
| commit | abc1f3329831606b06a934bba8ac3fc3df522e07 (patch) | |
| tree | 90d42123d4911fe3f4b6d291084f4ea7f6507333 /llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp | |
| parent | 718cea8e6864b9d185f14ee361fce77dc32c5cb8 (diff) | |
| download | llvm-abc1f3329831606b06a934bba8ac3fc3df522e07.zip llvm-abc1f3329831606b06a934bba8ac3fc3df522e07.tar.gz llvm-abc1f3329831606b06a934bba8ac3fc3df522e07.tar.bz2 | |
[BOLT][AArch64] Replace NOP with adrp in AdrRelaxationPass to preserve relative offsets.
Avoid replacing one adr instruction with two adrp+add by utilizing linker-provided nops
when they are present. By doing so we preserve relative offsets of next instructions
in a function which reduces chances to break undetected jump tables. This commit makes
release-mode lld-linked clang, lld and etc work after BOLT.
Reviewed By: rafauler, yota9
Differential Revision: https://reviews.llvm.org/D143887
Diffstat (limited to 'llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp')
0 files changed, 0 insertions, 0 deletions