diff options
| author | Alex Crichton <alex@alexcrichton.com> | 2025-07-02 05:26:30 +0200 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2025-07-01 20:26:30 -0700 |
| commit | a8a9a7f95a695c02bdf3d5821d1c62cc8e08c2ff (patch) | |
| tree | 7ee503b62faf68dcecf46e86a26adf7ca83f8257 /llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp | |
| parent | 2a702cdc38f96989cb41c0b863d977f0d8f4f325 (diff) | |
| download | llvm-a8a9a7f95a695c02bdf3d5821d1c62cc8e08c2ff.zip llvm-a8a9a7f95a695c02bdf3d5821d1c62cc8e08c2ff.tar.gz llvm-a8a9a7f95a695c02bdf3d5821d1c62cc8e08c2ff.tar.bz2 | |
[WebAssembly] Fix inline assembly with vector types (#146574)
This commit fixes using inline assembly with v128 results. Previously
this failed with an internal assertion about a failure to legalize a
`CopyFromReg` where the source register was typed `v8f16`. It looks like
the type used for the destination register was whatever was listed first
in the `def V128 : WebAssemblyRegClass` listing, so the types were
shuffled around to have a default-supported type.
A small test was added as well which failed to generate previously and
should now pass in generation. This test passed on LLVM 18 additionally
and regressed by accident in #93228 which was first included in LLVM 19.
Diffstat (limited to 'llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp')
0 files changed, 0 insertions, 0 deletions