aboutsummaryrefslogtreecommitdiff
path: root/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
diff options
context:
space:
mode:
authorJim Lin <jim@andestech.com>2025-05-12 16:58:39 +0800
committerGitHub <noreply@github.com>2025-05-12 16:58:39 +0800
commit9e27db0a50162023f25f119dc18a0f41b0824aac (patch)
tree63ed421c4249c672afa00c66cc4bdbdcdda17108 /llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
parent9600a12f0de233324b559f60997b9c2db153fede (diff)
downloadllvm-9e27db0a50162023f25f119dc18a0f41b0824aac.zip
llvm-9e27db0a50162023f25f119dc18a0f41b0824aac.tar.gz
llvm-9e27db0a50162023f25f119dc18a0f41b0824aac.tar.bz2
[RISCV] Add Andes XAndesVPackFPH (Andes Vector Packed FP16) extension. (#138827)
The spec can be found at: https://github.com/andestech/andes-v5-isa/releases/tag/ast-v5_4_0-release. This patch only supports assembler. Intrinsics support will be added in a later patch.
Diffstat (limited to 'llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp')
-rw-r--r--llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp3
1 files changed, 2 insertions, 1 deletions
diff --git a/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp b/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
index 8f1b790..ee8aa37 100644
--- a/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
+++ b/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
@@ -727,7 +727,8 @@ static constexpr FeatureBitset XTHeadGroup = {
RISCV::FeatureVendorXTHeadMemPair, RISCV::FeatureVendorXTHeadSync,
RISCV::FeatureVendorXTHeadVdot};
-static constexpr FeatureBitset XAndesGroup = {RISCV::FeatureVendorXAndesPerf};
+static constexpr FeatureBitset XAndesGroup = {
+ RISCV::FeatureVendorXAndesPerf, RISCV::FeatureVendorXAndesVPackFPH};
static constexpr DecoderListEntry DecoderList32[]{
// Vendor Extensions