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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2025-01-23 08:57:04 +0700 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2025-01-23 08:57:04 +0700 |
| commit | 6f69adeed6728e49c16d47bdde658285f49c8ed7 (patch) | |
| tree | 15002968c1473b1b632daff9bd87b47f8ad890c3 /llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp | |
| parent | 1042ddc31b594511657ff70a82d71e2d037e2e35 (diff) | |
| download | llvm-6f69adeed6728e49c16d47bdde658285f49c8ed7.zip llvm-6f69adeed6728e49c16d47bdde658285f49c8ed7.tar.gz llvm-6f69adeed6728e49c16d47bdde658285f49c8ed7.tar.bz2 | |
PeepholeOpt: Remove null TargetRegisterInfo check (#123933)
This cannot happen. Also simplify the LaneBitmask check from !none
to any.
Diffstat (limited to 'llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp')
0 files changed, 0 insertions, 0 deletions