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| author | Phoebe Wang <phoebe.wang@intel.com> | 2023-02-13 22:33:20 +0800 |
|---|---|---|
| committer | Phoebe Wang <phoebe.wang@intel.com> | 2023-02-13 22:57:56 +0800 |
| commit | 6a6c527ee287a4a7787fb5c519014c2e22f718c3 (patch) | |
| tree | adb10d7e9888fad8a3c35174f2d85d9baecfb29d /llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp | |
| parent | 388d679c1dfa7c0cb5c9ee6cd0b8592c3c3d09ef (diff) | |
| download | llvm-6a6c527ee287a4a7787fb5c519014c2e22f718c3.zip llvm-6a6c527ee287a4a7787fb5c519014c2e22f718c3.tar.gz llvm-6a6c527ee287a4a7787fb5c519014c2e22f718c3.tar.bz2 | |
[X86][FP16] Combine two steps conversions into direct conversion
When both v8i64 and v4f16 are not legal in a v8i64->v8f16 conversion, legalizer will breaks it into v8i64->v4i64->v4f32->v8f32->v8f16.
Given we support v4i64->v8f16, we can combine them with a shuffle instruction.
Reviewed By: LuoYuanke
Differential Revision: https://reviews.llvm.org/D143872
Diffstat (limited to 'llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp')
0 files changed, 0 insertions, 0 deletions