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| author | Job Noorman <jnoorman@igalia.com> | 2023-06-21 10:20:04 +0200 |
|---|---|---|
| committer | Job Noorman <jnoorman@igalia.com> | 2023-06-21 10:21:00 +0200 |
| commit | 5e67ae151e7d282eed7426c1c227ef8abc1c5a92 (patch) | |
| tree | 3b56dad6dab40451b7837295a87a2d6a86d123f8 /llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp | |
| parent | 1b9b78fd481a13b54afaf4804ee4ad18fcf006fd (diff) | |
| download | llvm-5e67ae151e7d282eed7426c1c227ef8abc1c5a92.zip llvm-5e67ae151e7d282eed7426c1c227ef8abc1c5a92.tar.gz llvm-5e67ae151e7d282eed7426c1c227ef8abc1c5a92.tar.bz2 | |
[BOLT][RISCV] Implement return/unconditional branch creation
Reviewed By: rafauler
Differential Revision: https://reviews.llvm.org/D153342
Diffstat (limited to 'llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp')
0 files changed, 0 insertions, 0 deletions