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| author | Craig Topper <craig.topper@sifive.com> | 2025-03-31 17:59:02 -0700 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2025-03-31 17:59:02 -0700 |
| commit | 508a6b2e01069f12150321ec779b3d30d4e76a6e (patch) | |
| tree | 441084a99335eb2a60a4f68405accb18e29c4fb2 /llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp | |
| parent | f9282475b305c0d2428640fa6586fe70f9b9f8d6 (diff) | |
| download | llvm-508a6b2e01069f12150321ec779b3d30d4e76a6e.zip llvm-508a6b2e01069f12150321ec779b3d30d4e76a6e.tar.gz llvm-508a6b2e01069f12150321ec779b3d30d4e76a6e.tar.bz2 | |
[RISCV] Use decodeUImmLog2XLenNonZeroOperand in decodeRVCInstrRdRs1UImm. NFC (#133759)
decodeUImmLog2XLenNonZeroOperand already contains the uimm5 check for
RV32 so we can reuse it. This makes C_SLLI_HINT code more similar to the
tblgen code for C_SLLI.
Diffstat (limited to 'llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp')
| -rw-r--r-- | llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp | 26 |
1 files changed, 11 insertions, 15 deletions
diff --git a/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp b/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp index b22a4a7..cda34ac 100644 --- a/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp +++ b/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp @@ -488,9 +488,10 @@ static DecodeStatus decodeRVCInstrRdSImm(MCInst &Inst, uint32_t Insn, uint64_t Address, const MCDisassembler *Decoder); -static DecodeStatus decodeRVCInstrRdRs1UImm(MCInst &Inst, uint32_t Insn, - uint64_t Address, - const MCDisassembler *Decoder); +static DecodeStatus +decodeRVCInstrRdRs1UImmLog2XLenNonZero(MCInst &Inst, uint32_t Insn, + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus decodeRVCInstrRdRs2(MCInst &Inst, uint32_t Insn, uint64_t Address, @@ -553,21 +554,16 @@ static DecodeStatus decodeRVCInstrRdSImm(MCInst &Inst, uint32_t Insn, return MCDisassembler::Success; } -static DecodeStatus decodeRVCInstrRdRs1UImm(MCInst &Inst, uint32_t Insn, - uint64_t Address, - const MCDisassembler *Decoder) { +static DecodeStatus +decodeRVCInstrRdRs1UImmLog2XLenNonZero(MCInst &Inst, uint32_t Insn, + uint64_t Address, + const MCDisassembler *Decoder) { Inst.addOperand(MCOperand::createReg(RISCV::X0)); Inst.addOperand(Inst.getOperand(0)); - uint32_t UImm6 = fieldFromInstruction(Insn, 12, 1) << 5; - // On RV32C, uimm[5]=1 is reserved for custom extensions. - if (UImm6 != 0 && Decoder->getSubtargetInfo().hasFeature(RISCV::Feature32Bit)) - return MCDisassembler::Fail; - UImm6 |= fieldFromInstruction(Insn, 2, 5); - [[maybe_unused]] DecodeStatus Result = - decodeUImmOperand<6>(Inst, UImm6, Address, Decoder); - assert(Result == MCDisassembler::Success && "Invalid immediate"); - return MCDisassembler::Success; + uint32_t UImm6 = + fieldFromInstruction(Insn, 12, 1) << 5 | fieldFromInstruction(Insn, 2, 5); + return decodeUImmLog2XLenNonZeroOperand(Inst, UImm6, Address, Decoder); } static DecodeStatus decodeRVCInstrRdRs2(MCInst &Inst, uint32_t Insn, |