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| author | Matthias Springer <me@m-sp.org> | 2023-06-21 09:17:32 +0200 |
|---|---|---|
| committer | Matthias Springer <me@m-sp.org> | 2023-06-21 09:19:17 +0200 |
| commit | 42a82b1ac6c834b7ce9766db22d169bd81415d52 (patch) | |
| tree | 46e7a7f5179352362cb856e4a472321f2668fcde /llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp | |
| parent | dae8c72495ed531dadecb91f19c23dd4ccbca160 (diff) | |
| download | llvm-42a82b1ac6c834b7ce9766db22d169bd81415d52.zip llvm-42a82b1ac6c834b7ce9766db22d169bd81415d52.tar.gz llvm-42a82b1ac6c834b7ce9766db22d169bd81415d52.tar.bz2 | |
[mlir][linalg][NFC] Add test case for memref vectorization
Add test cases for vectorizing linalg.matmul and linalg.copy on tensors.
Differential Revision: https://reviews.llvm.org/D153357
Diffstat (limited to 'llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp')
0 files changed, 0 insertions, 0 deletions