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| author | zhijian lin <zhijian@ca.ibm.com> | 2025-09-02 09:33:28 -0400 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2025-09-02 09:33:28 -0400 |
| commit | 36cb33bbcae8a7f988e101f5c9b23e7c68f73808 (patch) | |
| tree | 4ffb102978b27678e4f85f4832be92c4cfa9d014 /llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp | |
| parent | 3ee6170210796ae2837407cf46bf6cd02a6a3316 (diff) | |
| download | llvm-36cb33bbcae8a7f988e101f5c9b23e7c68f73808.zip llvm-36cb33bbcae8a7f988e101f5c9b23e7c68f73808.tar.gz llvm-36cb33bbcae8a7f988e101f5c9b23e7c68f73808.tar.bz2 | |
support branch hint for AtomicExpandImpl::expandAtomicCmpXchg (#152366)
The patch add branch hint for AtomicExpandImpl::expandAtomicCmpXchg, For
example: in PowerPC, it support branch hint as
```
loop:
lwarx r6,0,r3 # load and reserve
cmpw r4,r6 #1st 2 operands equal? bne- exit #skip if not
bne- exit #skip if not
stwcx. r5,0,r3 #store new value if still res’ved bne- loop #loop if lost reservation
bne- loop #loop if lost reservation
exit:
mr r4,r6 #return value from storage
```
`-` hints not taken,
`+` hints taken,
Diffstat (limited to 'llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp')
0 files changed, 0 insertions, 0 deletions