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| author | Jim Lin <jim@andestech.com> | 2025-07-15 08:59:00 +0800 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2025-07-15 08:59:00 +0800 |
| commit | 22707fd4a594a1b00cc68893dd1887c8971b4c98 (patch) | |
| tree | c16854d18b7eb512f9434d2b4adf8e1941c8f6f2 /llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp | |
| parent | cbba8f0acb537be00f649a640e98f8c92692fe9b (diff) | |
| download | llvm-22707fd4a594a1b00cc68893dd1887c8971b4c98.zip llvm-22707fd4a594a1b00cc68893dd1887c8971b4c98.tar.gz llvm-22707fd4a594a1b00cc68893dd1887c8971b4c98.tar.bz2 | |
[RISCV] Add Andes XAndesBFHCvt (Andes Scalar BFLOAT16) extension (#148563)
The spec can be found at:
https://github.com/andestech/andes-v5-isa/releases/tag/ast-v5_4_0-release.
The extension includes only two instructions: one for converting from
f32 to f16, and another for converting from f16 to f32.
This patch only implements MC support for XAndesBFHCvt.
Diffstat (limited to 'llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp')
| -rw-r--r-- | llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp b/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp index b723958..fa7bcfa 100644 --- a/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp +++ b/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp @@ -774,7 +774,8 @@ static constexpr FeatureBitset XTHeadGroup = { RISCV::FeatureVendorXTHeadVdot}; static constexpr FeatureBitset XAndesGroup = { - RISCV::FeatureVendorXAndesPerf, RISCV::FeatureVendorXAndesVBFHCvt, + RISCV::FeatureVendorXAndesPerf, RISCV::FeatureVendorXAndesBFHCvt, + RISCV::FeatureVendorXAndesVBFHCvt, RISCV::FeatureVendorXAndesVSIntLoad, RISCV::FeatureVendorXAndesVPackFPH, RISCV::FeatureVendorXAndesVDot}; |