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| author | Iris Shi <0.0@owo.li> | 2025-05-15 10:51:06 +0800 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2025-05-15 10:51:06 +0800 |
| commit | 1e503d08e1b6a285608e266acafd40eb2be5ca83 (patch) | |
| tree | 9fabca337ecd62095d414f9ee5932c3291d03828 /llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp | |
| parent | 4630d464c5cfd3f2ccdf3ac167694977736ce00e (diff) | |
| download | llvm-1e503d08e1b6a285608e266acafd40eb2be5ca83.zip llvm-1e503d08e1b6a285608e266acafd40eb2be5ca83.tar.gz llvm-1e503d08e1b6a285608e266acafd40eb2be5ca83.tar.bz2 | |
[RISCV][MC] Add support for Q extension (#139369)
Closes #130217.
https://github.com/riscv/riscv-isa-manual/blob/main/src/q-st-ext.adoc
Diffstat (limited to 'llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp')
| -rw-r--r-- | llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp b/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp index 1dab851..a5e7666 100644 --- a/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp +++ b/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp @@ -177,6 +177,17 @@ static DecodeStatus DecodeFPR64CRegisterClass(MCInst &Inst, uint32_t RegNo, return MCDisassembler::Success; } +static DecodeStatus DecodeFPR128RegisterClass(MCInst &Inst, uint32_t RegNo, + uint64_t Address, + const MCDisassembler *Decoder) { + if (RegNo >= 32) + return MCDisassembler::Fail; + + MCRegister Reg = RISCV::F0_Q + RegNo; + Inst.addOperand(MCOperand::createReg(Reg)); + return MCDisassembler::Success; +} + static DecodeStatus DecodeGPRNoX0RegisterClass(MCInst &Inst, uint32_t RegNo, uint64_t Address, const MCDisassembler *Decoder) { |