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| author | Craig Topper <craig.topper@sifive.com> | 2025-04-04 13:59:33 -0700 |
|---|---|---|
| committer | Craig Topper <craig.topper@sifive.com> | 2025-04-04 13:59:49 -0700 |
| commit | 19e0233eb844e653a3108de411366bd0165cf3ec (patch) | |
| tree | 6e343db83e133739e4d4f28e5c11fa2862145893 /llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp | |
| parent | 24dfcc0c024f9ab8ba61c0994513f57e882961fc (diff) | |
| download | llvm-19e0233eb844e653a3108de411366bd0165cf3ec.zip llvm-19e0233eb844e653a3108de411366bd0165cf3ec.tar.gz llvm-19e0233eb844e653a3108de411366bd0165cf3ec.tar.bz2 | |
[RISCV] Make decodeXqccmpRlistS0 defer to decodeZcmpRlist after checking for S0 being included. NFC
This reduces code duplication.
Diffstat (limited to 'llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp')
| -rw-r--r-- | llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp b/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp index b705d03..366291b 100644 --- a/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp +++ b/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp @@ -658,11 +658,9 @@ static DecodeStatus decodeZcmpRlist(MCInst &Inst, uint32_t Imm, static DecodeStatus decodeXqccmpRlistS0(MCInst &Inst, uint32_t Imm, uint64_t Address, const MCDisassembler *Decoder) { - bool IsRVE = Decoder->getSubtargetInfo().hasFeature(RISCV::FeatureStdExtE); - if (Imm < RISCVZC::RA_S0 || (IsRVE && Imm >= RISCVZC::RA_S0_S2)) + if (Imm < RISCVZC::RA_S0) return MCDisassembler::Fail; - Inst.addOperand(MCOperand::createImm(Imm)); - return MCDisassembler::Success; + return decodeZcmpRlist(Inst, Imm, Address, Decoder); } // Add implied SP operand for C.*SP compressed instructions. The SP operand |