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| author | Sergei Barannikov <barannikov88@gmail.com> | 2023-05-24 12:57:07 +0300 |
|---|---|---|
| committer | Sergei Barannikov <barannikov88@gmail.com> | 2023-05-25 05:47:59 +0300 |
| commit | 0f3efb8d7f3f0c96c82a98c12d2a26404116cc56 (patch) | |
| tree | 597984be6af61df75403638138d6220e33ecb216 /llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp | |
| parent | dbbcfef64f0c189238dc2f93ff0edb56aa2eb680 (diff) | |
| download | llvm-0f3efb8d7f3f0c96c82a98c12d2a26404116cc56.zip llvm-0f3efb8d7f3f0c96c82a98c12d2a26404116cc56.tar.gz llvm-0f3efb8d7f3f0c96c82a98c12d2a26404116cc56.tar.bz2 | |
[CodeGen] Skip null physical register in AntiDepBreaker (NFCI)
D151036 adds an assertions that prohibits iterating over sub- and
super-registers of a null register. This is already the case when
iterating over register units of a null register, and worked by
accident for sub- and super-registers.
The only place where the assertion is currently triggering is in
CriticalAntiDepBreaker::ScanInstruction. Other places are changed
in case new assertions are added and should be harmless otherwise.
Diffstat (limited to 'llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp')
0 files changed, 0 insertions, 0 deletions