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| author | Florian Hahn <flo@fhahn.com> | 2023-04-09 21:01:10 +0100 |
|---|---|---|
| committer | Florian Hahn <flo@fhahn.com> | 2023-04-09 21:01:21 +0100 |
| commit | 0dbcbfe0d014bae2e00232366bfbae2914fd713e (patch) | |
| tree | b0dfd569a290c31ebaab68b5b05a9b43e9cfd9a6 /llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp | |
| parent | 3c83480ae95dde9b5d45b6fd7cdb1c64332531d7 (diff) | |
| download | llvm-0dbcbfe0d014bae2e00232366bfbae2914fd713e.zip llvm-0dbcbfe0d014bae2e00232366bfbae2914fd713e.tar.gz llvm-0dbcbfe0d014bae2e00232366bfbae2914fd713e.tar.bz2 | |
[VPlan] Don't assign slots for external defs (NFCI).
External defs are VPValues wrapping an IR value and hence will get
printed as ir<>. We don't need to assign a slot for a VPValue number.
Diffstat (limited to 'llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp')
0 files changed, 0 insertions, 0 deletions