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| author | Craig Topper <craig.topper@sifive.com> | 2023-07-30 12:00:46 -0700 |
|---|---|---|
| committer | Craig Topper <craig.topper@sifive.com> | 2023-07-30 12:00:46 -0700 |
| commit | 0c7d897627248896f890e3b8ffd6bab1cc5ed746 (patch) | |
| tree | d46618e70a9a52fad20c372ceab2913425df7d32 /llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp | |
| parent | ad7f02010f32bff28fec139e103ad0240e160aa9 (diff) | |
| download | llvm-0c7d897627248896f890e3b8ffd6bab1cc5ed746.zip llvm-0c7d897627248896f890e3b8ffd6bab1cc5ed746.tar.gz llvm-0c7d897627248896f890e3b8ffd6bab1cc5ed746.tar.bz2 | |
[RISCV] Rename DecoderNamespace for XCVsimd to be consistent with other XCV extensions. NFC
Diffstat (limited to 'llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp')
| -rw-r--r-- | llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp b/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp index c02c4b1..9ec69cf 100644 --- a/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp +++ b/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp @@ -567,7 +567,7 @@ DecodeStatus RISCVDisassembler::getInstruction(MCInst &MI, uint64_t &Size, "CORE-V MAC custom opcode table"); TRY_TO_DECODE_FEATURE(RISCV::FeatureVendorXCValu, DecoderTableXCValu32, "CORE-V ALU custom opcode table"); - TRY_TO_DECODE_FEATURE(RISCV::FeatureVendorXCVsimd, DecoderTableCoreVSIMD32, + TRY_TO_DECODE_FEATURE(RISCV::FeatureVendorXCVsimd, DecoderTableXCVsimd32, "CORE-V SIMD extensions custom opcode table"); TRY_TO_DECODE_FEATURE(RISCV::FeatureVendorXCVbi, DecoderTableXCVbi32, "CORE-V Immediate Branching custom opcode table"); |