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| author | WANG Xuerui <git@xen0n.name> | 2023-06-21 16:04:57 +0800 |
|---|---|---|
| committer | Weining Lu <luweining@loongson.cn> | 2023-06-21 16:41:10 +0800 |
| commit | 00786d3a5f229b11a41dcbc4c6081edeaa7ee5b7 (patch) | |
| tree | 5b65776be90a1791ae5a218563b6ed5b86216883 /llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp | |
| parent | adbb5ebf08ce738ba2c144fbf1c7ab8781e3fb96 (diff) | |
| download | llvm-00786d3a5f229b11a41dcbc4c6081edeaa7ee5b7.zip llvm-00786d3a5f229b11a41dcbc4c6081edeaa7ee5b7.tar.gz llvm-00786d3a5f229b11a41dcbc4c6081edeaa7ee5b7.tar.bz2 | |
[LoongArch] Support CodeModel::Large codegen
This is intended to behave like GCC's `-mcmodel=extreme`.
Technically the true GCC equivalent would be `-mcmodel=large` which is
not yet implemented there, and we probably do not want to take the
"Large" name until things settle in GCC side, but:
* LLVM does not have a `CodeModel::Extreme`, and it seems too early to
have such a variant added just for enabling LoongArch; and
* `CodeModel::Small` is already being used for GCC `-mcmodel=normal`
which is already a case of divergent naming.
Regarding the codegen, loads/stores immediately after a PC-relative
large address load (that ends with something like `add.d $addr, $addr,
$tmp`) should get merged with the addition into corresponding `ldx/stx`
ops, but is currently not done. This is because pseudo-instructions are
expanded after instruction selection, and is best fixed with a separate
change.
Reviewed By: SixWeining
Differential Revision: https://reviews.llvm.org/D150522
Diffstat (limited to 'llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp')
0 files changed, 0 insertions, 0 deletions