aboutsummaryrefslogtreecommitdiff
path: root/llvm/lib/Target/R600/SILowerControlFlow.cpp
diff options
context:
space:
mode:
authorMichel Danzer <michel.daenzer@amd.com>2014-02-27 01:47:09 +0000
committerMichel Danzer <michel.daenzer@amd.com>2014-02-27 01:47:09 +0000
commit9e61c4b6cd947f87c2b9ceb86f7ef482eb04ccc7 (patch)
tree483985d057d7232372540cdb1e8eaee8f8808ecd /llvm/lib/Target/R600/SILowerControlFlow.cpp
parent6f273c57db5862a11ed8646f54feb766c4dbe72c (diff)
downloadllvm-9e61c4b6cd947f87c2b9ceb86f7ef482eb04ccc7.zip
llvm-9e61c4b6cd947f87c2b9ceb86f7ef482eb04ccc7.tar.gz
llvm-9e61c4b6cd947f87c2b9ceb86f7ef482eb04ccc7.tar.bz2
R600/SI: Optimize SI_KILL for constant operands
If the SI_KILL operand is constant, we can either clear the exec mask if the operand is negative, or do nothing otherwise. Reviewed-by: Tom Stellard <thomas.stellard@amd.com> llvm-svn: 202337
Diffstat (limited to 'llvm/lib/Target/R600/SILowerControlFlow.cpp')
-rw-r--r--llvm/lib/Target/R600/SILowerControlFlow.cpp19
1 files changed, 15 insertions, 4 deletions
diff --git a/llvm/lib/Target/R600/SILowerControlFlow.cpp b/llvm/lib/Target/R600/SILowerControlFlow.cpp
index fa5ee16..50dcf4e 100644
--- a/llvm/lib/Target/R600/SILowerControlFlow.cpp
+++ b/llvm/lib/Target/R600/SILowerControlFlow.cpp
@@ -55,6 +55,7 @@
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
+#include "llvm/IR/Constants.h"
using namespace llvm;
@@ -294,6 +295,7 @@ void SILowerControlFlowPass::Branch(MachineInstr &MI) {
void SILowerControlFlowPass::Kill(MachineInstr &MI) {
MachineBasicBlock &MBB = *MI.getParent();
DebugLoc DL = MI.getDebugLoc();
+ const MachineOperand &Op = MI.getOperand(0);
// Kill is only allowed in pixel / geometry shaders
assert(MBB.getParent()->getInfo<SIMachineFunctionInfo>()->ShaderType ==
@@ -301,10 +303,19 @@ void SILowerControlFlowPass::Kill(MachineInstr &MI) {
MBB.getParent()->getInfo<SIMachineFunctionInfo>()->ShaderType ==
ShaderType::GEOMETRY);
- // Clear this pixel from the exec mask if the operand is negative
- BuildMI(MBB, &MI, DL, TII->get(AMDGPU::V_CMPX_LE_F32_e32), AMDGPU::VCC)
- .addImm(0)
- .addOperand(MI.getOperand(0));
+ // Clear this thread from the exec mask if the operand is negative
+ if ((Op.isImm() || Op.isFPImm())) {
+ // Constant operand: Set exec mask to 0 or do nothing
+ if (Op.isImm() ? (Op.getImm() & 0x80000000) :
+ Op.getFPImm()->isNegative()) {
+ BuildMI(MBB, &MI, DL, TII->get(AMDGPU::S_MOV_B64), AMDGPU::EXEC)
+ .addImm(0);
+ }
+ } else {
+ BuildMI(MBB, &MI, DL, TII->get(AMDGPU::V_CMPX_LE_F32_e32), AMDGPU::VCC)
+ .addImm(0)
+ .addOperand(Op);
+ }
MI.eraseFromParent();
}