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author | Benjamin Maxwell <benjamin.maxwell@arm.com> | 2022-12-12 16:26:20 +0000 |
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committer | Benjamin Maxwell <benjamin.maxwell@arm.com> | 2022-12-15 13:50:02 +0000 |
commit | 3010f60381bcd828d1b409cfaa576328bcd05bbc (patch) | |
tree | 3bdc07cd8549b5699cff8cabb023c331ea0a4645 /llvm/lib/Target/PowerPC/PPCSubtarget.cpp | |
parent | 1cdffa359a3344f966ed309de17af17f8abfbe4d (diff) | |
download | llvm-3010f60381bcd828d1b409cfaa576328bcd05bbc.zip llvm-3010f60381bcd828d1b409cfaa576328bcd05bbc.tar.gz llvm-3010f60381bcd828d1b409cfaa576328bcd05bbc.tar.bz2 |
Reland "[TargetLowering] Teach DemandedBits about VSCALE"
Reland with a fixup to avoid converting APInts to int64_t which allowed for
overflows (UB) with sufficiently high/low multiplier values.
This allows DemandedBits to see the result of VSCALE will be at most
VScaleMax * some compile-time constant. This relies on the vscale_range()
attribute being present on the function, with a max set. (This is done by
default when clang is targeting AArch64+SVE).
Using this various redundant operations (zexts, sexts, ands, ors, etc)
can be eliminated.
Differential Revision: https://reviews.llvm.org/D138508
Diffstat (limited to 'llvm/lib/Target/PowerPC/PPCSubtarget.cpp')
0 files changed, 0 insertions, 0 deletions