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| author | Anton Sidorenko <anton.sidorenko@syntacore.com> | 2022-11-24 15:30:01 +0300 |
|---|---|---|
| committer | Anton Sidorenko <anton.sidorenko@syntacore.com> | 2022-12-15 16:48:30 +0300 |
| commit | 1cdffa359a3344f966ed309de17af17f8abfbe4d (patch) | |
| tree | 1c4249b70b192f0c2735693fa1a3d3a824355576 /llvm/lib/Target/PowerPC/PPCSubtarget.cpp | |
| parent | 260ba2f2242253a1e9f5eada5a14ebb25ba689cf (diff) | |
| download | llvm-1cdffa359a3344f966ed309de17af17f8abfbe4d.zip llvm-1cdffa359a3344f966ed309de17af17f8abfbe4d.tar.gz llvm-1cdffa359a3344f966ed309de17af17f8abfbe4d.tar.bz2 | |
[MachineCombiner][RISCV] Support inverse instructions reassociation
This patch adds reassociation of FADD/FSUB instruction pairs.
Differential Revision: https://reviews.llvm.org/D138660
Diffstat (limited to 'llvm/lib/Target/PowerPC/PPCSubtarget.cpp')
0 files changed, 0 insertions, 0 deletions