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| author | Simon Dardis <simon.dardis@imgtec.com> | 2016-10-14 09:31:42 +0000 |
|---|---|---|
| committer | Simon Dardis <simon.dardis@imgtec.com> | 2016-10-14 09:31:42 +0000 |
| commit | b3fd189cb5030f394db0414e2d06d779adfad062 (patch) | |
| tree | d690936541f6ff64274c9bf249f920d11b74a68c /llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp | |
| parent | ccc6502abcbff4489261cc87e099f148248c22c0 (diff) | |
| download | llvm-b3fd189cb5030f394db0414e2d06d779adfad062.zip llvm-b3fd189cb5030f394db0414e2d06d779adfad062.tar.gz llvm-b3fd189cb5030f394db0414e2d06d779adfad062.tar.bz2 | |
[mips] Fix aui/daui/dahi/dati for MIPSR6
For compatiblity with binutils, define these instructions to take
two registers with a 16bit unsigned immediate. Both of the registers
have to be same for dahi and dati.
Reviewers: dsanders, zoran.jovanovic
Differential Review: https://reviews.llvm.org/D21473
llvm-svn: 284218
Diffstat (limited to 'llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp')
| -rw-r--r-- | llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp | 20 |
1 files changed, 14 insertions, 6 deletions
diff --git a/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp b/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp index b992988..c5a259b 100644 --- a/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp +++ b/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp @@ -447,6 +447,14 @@ static DecodeStatus DecodeDAHIDATI(MCInst &MI, InsnType insn, uint64_t Address, const void *Decoder); template <typename InsnType> +static DecodeStatus DecodeDAHIDATIMMR6(MCInst &MI, InsnType insn, uint64_t Address, + const void *Decoder); + +template <typename InsnType> +static DecodeStatus DecodeDAHIDATI(MCInst &MI, InsnType insn, uint64_t Address, + const void *Decoder); + +template <typename InsnType> static DecodeStatus DecodeAddiGroupBranch(MCInst &MI, InsnType insn, uint64_t Address, const void *Decoder); @@ -608,12 +616,12 @@ static DecodeStatus DecodeINSVE_DF(MCInst &MI, InsnType insn, uint64_t Address, template <typename InsnType> static DecodeStatus DecodeDAHIDATIMMR6(MCInst &MI, InsnType insn, uint64_t Address, const void *Decoder) { - InsnType Rt = fieldFromInstruction(insn, 16, 5); + InsnType Rs = fieldFromInstruction(insn, 16, 5); InsnType Imm = fieldFromInstruction(insn, 0, 16); MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR64RegClassID, - Rt))); + Rs))); MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR64RegClassID, - Rt))); + Rs))); MI.addOperand(MCOperand::createImm(Imm)); return MCDisassembler::Success; @@ -622,12 +630,12 @@ static DecodeStatus DecodeDAHIDATIMMR6(MCInst &MI, InsnType insn, uint64_t Addre template <typename InsnType> static DecodeStatus DecodeDAHIDATI(MCInst &MI, InsnType insn, uint64_t Address, const void *Decoder) { - InsnType Rt = fieldFromInstruction(insn, 21, 5); + InsnType Rs = fieldFromInstruction(insn, 21, 5); InsnType Imm = fieldFromInstruction(insn, 0, 16); MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR64RegClassID, - Rt))); + Rs))); MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR64RegClassID, - Rt))); + Rs))); MI.addOperand(MCOperand::createImm(Imm)); return MCDisassembler::Success; |