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| author | Colin LeMahieu <colinl@codeaurora.org> | 2016-03-16 20:00:38 +0000 |
|---|---|---|
| committer | Colin LeMahieu <colinl@codeaurora.org> | 2016-03-16 20:00:38 +0000 |
| commit | bb0cdfb9f7b79f13ce340d7571bd36b02a829792 (patch) | |
| tree | fbe3d3eb10f7b10b4b8fa998c2a6d5e0a79443cd /llvm/lib/Target/Hexagon/Disassembler/HexagonDisassembler.cpp | |
| parent | fea398188c3e8455eac807b4a70935ef4b3bbb90 (diff) | |
| download | llvm-bb0cdfb9f7b79f13ce340d7571bd36b02a829792.zip llvm-bb0cdfb9f7b79f13ce340d7571bd36b02a829792.tar.gz llvm-bb0cdfb9f7b79f13ce340d7571bd36b02a829792.tar.bz2 | |
[Hexagon] Adding missing break in switch statement. Extra operands would have been appended to the end.
llvm-svn: 263657
Diffstat (limited to 'llvm/lib/Target/Hexagon/Disassembler/HexagonDisassembler.cpp')
| -rw-r--r-- | llvm/lib/Target/Hexagon/Disassembler/HexagonDisassembler.cpp | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/llvm/lib/Target/Hexagon/Disassembler/HexagonDisassembler.cpp b/llvm/lib/Target/Hexagon/Disassembler/HexagonDisassembler.cpp index 350e312..90fc2c6 100644 --- a/llvm/lib/Target/Hexagon/Disassembler/HexagonDisassembler.cpp +++ b/llvm/lib/Target/Hexagon/Disassembler/HexagonDisassembler.cpp @@ -1460,6 +1460,7 @@ void HexagonDisassembler::addSubinstOperands(MCInst *MI, unsigned opcode, operand = getRegFromSubinstEncoding((inst & 0xf0) >> 4); Op = MCOperand::createReg(operand); MI->addOperand(Op); + break; case Hexagon::V4_SA1_and1: case Hexagon::V4_SA1_dec: case Hexagon::V4_SA1_inc: |