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| author | Craig Topper <craig.topper@intel.com> | 2019-02-25 03:11:44 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2019-02-25 03:11:44 +0000 |
| commit | 8c9724ea4fcfa774949999c07e0e2b4a15f39496 (patch) | |
| tree | 8b815aeaa2e95d35359224ee0c8746ec3b8e50a1 /llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp | |
| parent | 4faa4090c9e2c4b662475c7b5eb76d28849456b3 (diff) | |
| download | llvm-8c9724ea4fcfa774949999c07e0e2b4a15f39496.zip llvm-8c9724ea4fcfa774949999c07e0e2b4a15f39496.tar.gz llvm-8c9724ea4fcfa774949999c07e0e2b4a15f39496.tar.bz2 | |
[SelectionDAG] Add a OPC_CheckChild2CondCode to SelectionDAGISel to remove a MoveChild and MoveParent pair.
OPC_CheckCondCode is always used as operand 2 of a setcc. And its always surrounded by a MoveChild2 and a MoveParent. By having a dedicated opcode for this case we can reduce the number of bytes needed for this pattern from 4 bytes to 2.
This saves ~3000 bytes in the X86 table.
llvm-svn: 354763
Diffstat (limited to 'llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp')
0 files changed, 0 insertions, 0 deletions