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| author | Kang Zhang <shkzhang@cn.ibm.com> | 2019-02-25 02:46:16 +0000 |
|---|---|---|
| committer | Kang Zhang <shkzhang@cn.ibm.com> | 2019-02-25 02:46:16 +0000 |
| commit | 4faa4090c9e2c4b662475c7b5eb76d28849456b3 (patch) | |
| tree | 33028d47447f7107b389483dc1e266b2c1f3fb25 /llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp | |
| parent | 25e690273ac15efd5b2afa3ee5b3bde36913ca33 (diff) | |
| download | llvm-4faa4090c9e2c4b662475c7b5eb76d28849456b3.zip llvm-4faa4090c9e2c4b662475c7b5eb76d28849456b3.tar.gz llvm-4faa4090c9e2c4b662475c7b5eb76d28849456b3.tar.bz2 | |
[PowerPC] [PowerPC] Enhance the fast selection of fptoi & fptrunc instruction and clean up related asserts
Summary:
Fast selection of llvm fptoi & fptrunc instructions is not handled well about
VSX instruction support.
We'd use VSX float convert integer instruction instead of non-vsx float convert
integer instruction if the operand register class is VSSRC or VSFRC because i32
and i64 are mapped to VSSRC and VSFRC correspondingly if VSX feature is
openeded.
For float trunc instruction, we do this silimar work like float convert integer
instruction to try to use VSX instruction.
Reviewed By: jsji
Differential Revision: https://reviews.llvm.org/D58430
llvm-svn: 354762
Diffstat (limited to 'llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp')
0 files changed, 0 insertions, 0 deletions