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| author | Craig Topper <craig.topper@intel.com> | 2018-03-19 19:00:35 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2018-03-19 19:00:35 +0000 |
| commit | 5e65996facfdaca8d2411afdf1c4e4064dd59a83 (patch) | |
| tree | ad6251001727a13c0da6549c472fc434847d6ec5 /llvm/lib/DebugInfo/CodeView/DebugCrossImpSubsection.cpp | |
| parent | b4c7873f8cb8131fdef833e6abfaac4261930f54 (diff) | |
| download | llvm-5e65996facfdaca8d2411afdf1c4e4064dd59a83.zip llvm-5e65996facfdaca8d2411afdf1c4e4064dd59a83.tar.gz llvm-5e65996facfdaca8d2411afdf1c4e4064dd59a83.tar.bz2 | |
[X86] Remove OUT32rr/OUT8rr/OUT32ri/OUT8ri from Sandybridge scheduler model.
PR35590 was already filed for this information being wrong. It's probably better to default to WriteSystem behavior instead of using something completely wrong.
llvm-svn: 327882
Diffstat (limited to 'llvm/lib/DebugInfo/CodeView/DebugCrossImpSubsection.cpp')
0 files changed, 0 insertions, 0 deletions