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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2020-01-14 16:02:02 -0500 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2020-01-24 12:15:10 -0800 |
| commit | 9c346464c15c9f42fd641c33ca4c35b31556a661 (patch) | |
| tree | 15eb4fc2f9c0f74c732b6e7ba0b9a4a2fba4a106 /llvm/lib/CodeGen/MachineScheduler.cpp | |
| parent | d8328c0b6240234c8036f16c081ab7e8dc98cce8 (diff) | |
| download | llvm-9c346464c15c9f42fd641c33ca4c35b31556a661.zip llvm-9c346464c15c9f42fd641c33ca4c35b31556a661.tar.gz llvm-9c346464c15c9f42fd641c33ca4c35b31556a661.tar.bz2 | |
TableGen/GlobalISel: Handle non-leaf EXTRACT_SUBREG
This previously only handled EXTRACT_SUBREGs from leafs, such as
operands directly in the original output. Handle extracting from a
result instruction.
Diffstat (limited to 'llvm/lib/CodeGen/MachineScheduler.cpp')
0 files changed, 0 insertions, 0 deletions