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| author | Michael Maitland <michaeltmaitland@gmail.com> | 2023-11-15 17:30:53 -0500 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2023-11-15 17:30:53 -0500 |
| commit | 725e599637d9764b60aa09d5d4d3266b6dfc4e60 (patch) | |
| tree | 920f03cf80d026e424b9a8e19ce351ef3fc424f5 /llvm/lib/CodeGen/MachineBasicBlock.cpp | |
| parent | 0b8379bff752c02d6cf0c0458085025c24d70118 (diff) | |
| download | llvm-725e599637d9764b60aa09d5d4d3266b6dfc4e60.zip llvm-725e599637d9764b60aa09d5d4d3266b6dfc4e60.tar.gz llvm-725e599637d9764b60aa09d5d4d3266b6dfc4e60.tar.bz2 | |
[RISCV][GISEL] Add support for scalable vector types in lowerReturnVal (#71587)
Scalable vector types from LLVM IR are lowered into physical vector
registers in MIR based on calling convention for return instructions.
Diffstat (limited to 'llvm/lib/CodeGen/MachineBasicBlock.cpp')
0 files changed, 0 insertions, 0 deletions