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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2024-11-26 19:23:15 -0500 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-11-26 19:23:15 -0500 |
| commit | eeb76880f3489f1e7e6224a26ec4abc7f6da4e34 (patch) | |
| tree | 7c7a56802c72e08a4b2e100c6d49867e860f3db1 /llvm/lib/Bitcode/Writer/BitcodeWriterPass.cpp | |
| parent | 2b9e947d4346ad03328a31f90b9056837c042d1b (diff) | |
| download | llvm-eeb76880f3489f1e7e6224a26ec4abc7f6da4e34.zip llvm-eeb76880f3489f1e7e6224a26ec4abc7f6da4e34.tar.gz llvm-eeb76880f3489f1e7e6224a26ec4abc7f6da4e34.tar.bz2 | |
AMDGPU: Builtins & CodeGen support for v_cvt_scalef32_pk_{f|bf}16_fp4 for gfx950 (#117744)
OPSEL ASM Syntax for v_cvt_scalef32_pk_{f|bf}16_fp4 : opsel:[x,y,z]
where, x & y i.e. OPSEL[1 : 0] selects which src_byte to read.
Note: Conventional Inst{13} i.e. OPSEL[2] is ignored in asm syntax.
Co-authored-by: Pravin Jagtap <Pravin.Jagtap@amd.com>
Diffstat (limited to 'llvm/lib/Bitcode/Writer/BitcodeWriterPass.cpp')
0 files changed, 0 insertions, 0 deletions