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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2024-11-26 19:20:09 -0500 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-11-26 19:20:09 -0500 |
| commit | 2b9e947d4346ad03328a31f90b9056837c042d1b (patch) | |
| tree | b8af84dc9e705c387fc3a9577b1b306c1431ec47 /llvm/lib/Bitcode/Writer/BitcodeWriterPass.cpp | |
| parent | 4527894143a2749d826769e78ab4e0f50782b188 (diff) | |
| download | llvm-2b9e947d4346ad03328a31f90b9056837c042d1b.zip llvm-2b9e947d4346ad03328a31f90b9056837c042d1b.tar.gz llvm-2b9e947d4346ad03328a31f90b9056837c042d1b.tar.bz2 | |
AMDGPU: Builtins & Codegen support for v_cvt_scale_fp4<->f32 for gfx950 (#117743)
OPSEL ASM Syntax for v_cvt_scalef32_pk_f32_fp4 : opsel:[x,y,z]
where, x & y i.e. OPSEL[1 : 0] selects which src_byte to read.
OPSEL ASM Syntax for v_cvt_scalef32_pk_fp4_f32 : opsel:[a,b,c,d]
where, c & d i.e. OPSEL[3 : 2] selects which dst_byte to write.
Co-authored-by: Pravin Jagtap <Pravin.Jagtap@amd.com>
Diffstat (limited to 'llvm/lib/Bitcode/Writer/BitcodeWriterPass.cpp')
0 files changed, 0 insertions, 0 deletions