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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2024-11-26 19:26:07 -0500 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-11-26 19:26:07 -0500 |
| commit | 0f4fcca546a489f50535086a313f8c054ea41791 (patch) | |
| tree | 868c4532273da098b88afe0a0af365d021cf1d63 /llvm/lib/Bitcode/Writer/BitcodeWriterPass.cpp | |
| parent | eeb76880f3489f1e7e6224a26ec4abc7f6da4e34 (diff) | |
| download | llvm-0f4fcca546a489f50535086a313f8c054ea41791.zip llvm-0f4fcca546a489f50535086a313f8c054ea41791.tar.gz llvm-0f4fcca546a489f50535086a313f8c054ea41791.tar.bz2 | |
AMDGPU: Builtin & CodeGen support for v_cvt_scalef32_pk32_f32_[fp|bf]6 for gfx950 (#117745)
Co-authored-by: Pravin Jagtap <Pravin.Jagtap@amd.com>
Diffstat (limited to 'llvm/lib/Bitcode/Writer/BitcodeWriterPass.cpp')
0 files changed, 0 insertions, 0 deletions