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| author | Jay Foad <jay.foad@amd.com> | 2021-09-23 08:24:28 +0100 |
|---|---|---|
| committer | Jay Foad <jay.foad@amd.com> | 2021-09-24 11:58:08 +0100 |
| commit | e4e95f14f15aceb2641c2b917eca58aaf988c4a7 (patch) | |
| tree | 6f12d7c792fa1d0c1a28305c9e1fc231ab765a67 /llvm/lib/Bitcode/Writer/BitWriter.cpp | |
| parent | 7863cc6c1c9e714de666f7df84fe9ef6ea7bb06c (diff) | |
| download | llvm-e4e95f14f15aceb2641c2b917eca58aaf988c4a7.zip llvm-e4e95f14f15aceb2641c2b917eca58aaf988c4a7.tar.gz llvm-e4e95f14f15aceb2641c2b917eca58aaf988c4a7.tar.bz2 | |
[LiveIntervals] Repair live intervals that gain subranges
In repairIntervalsInRange, if the new instructions refer to subregs but
the old instructions did not, make sure any existing live interval for
the superreg is updated to have subranges. Also skip repairing any range
that we have recalculated from scratch, partly for efficiency but also
to avoids some cases that repairOldRegInRange can't handle.
The existing test/CodeGen/AMDGPU/twoaddr-regsequence.mir provides some
test coverage for this change: when TwoAddressInstructionPass converts
REG_SEQUENCE into subreg copies, the live intervals will now get
subranges and MachineVerifier will verify that the subranges are
correct. Unfortunately MachineVerifier does not complain if the
subranges are not present, so the test also passed before this patch.
This patch also fixes ~800 of the ~1500 failures in the whole CodeGen
lit test suite when -early-live-intervals is forced on.
Differential Revision: https://reviews.llvm.org/D110328
Diffstat (limited to 'llvm/lib/Bitcode/Writer/BitWriter.cpp')
0 files changed, 0 insertions, 0 deletions