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author | Roman Lebedev <lebedev.ri@gmail.com> | 2021-09-27 22:18:40 +0300 |
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committer | Roman Lebedev <lebedev.ri@gmail.com> | 2021-09-27 22:20:01 +0300 |
commit | ee5a050e2e548991f0369fa7ee29fb3e7aade071 (patch) | |
tree | ea3f8689305d55cdd0533195e539af064e0a127d /llvm/lib/Analysis/ModuleSummaryAnalysis.cpp | |
parent | 5615d6a6dd3f904cc9e1a219bfaf7df8183ee765 (diff) | |
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[X86][Costmodel] Load/store i16 Stride=4 VF=16 interleaving costs
The only sched models that for cpu's that support avx2
but not avx512 are: haswell, broadwell, skylake, zen1-3
For load we have:
https://godbolt.org/z/Wd9cKab83 - for intels `Block RThroughput: =75.0`; for ryzens, `Block RThroughput: <=29.5`
So pick cost of `75`. (note that `# 32-byte Reload` does not affect throughput there.)
For store we have:
https://godbolt.org/z/Wd9cKab83 - for intels `Block RThroughput: =32.0`; for ryzens, `Block RThroughput: <=12.0`
So pick cost of `32`.
I'm directly using the shuffling asm the llc produced,
without any manual fixups that may be needed
to ensure sequential execution.
Reviewed By: RKSimon
Differential Revision: https://reviews.llvm.org/D110543
Diffstat (limited to 'llvm/lib/Analysis/ModuleSummaryAnalysis.cpp')
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