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| author | Christudasan Devadasan <Christudasan.Devadasan@amd.com> | 2022-04-13 11:28:59 +0530 |
|---|---|---|
| committer | Christudasan Devadasan <Christudasan.Devadasan@amd.com> | 2022-12-17 11:49:41 +0530 |
| commit | b25b4c0ab4ad1acc1490c7560970a2e80cf94b3e (patch) | |
| tree | e7b0dc6bb44368c015e9c18a8987b1c404675182 /clang/lib/Lex/ModuleMap.cpp | |
| parent | 5ebe91fcb2a19ca58bb7a2ef97e8a33a85f3ce77 (diff) | |
| download | llvm-b25b4c0ab4ad1acc1490c7560970a2e80cf94b3e.zip llvm-b25b4c0ab4ad1acc1490c7560970a2e80cf94b3e.tar.gz llvm-b25b4c0ab4ad1acc1490c7560970a2e80cf94b3e.tar.bz2 | |
[AMDGPU] Separate out SGPR spills to VGPR lanes during PEI
SILowerSGPRSpills pass handles the lowering of SGPR spills
into VGPR lanes. Some SGPR spills are handled later during
PEI. There is a common function used in both places to find
the free VGPR lane. This patch eliminates that dependency to
find the free VGPR by handling it separately for PEI. It is a
prerequisite patch for a future work to allow SGPR spills to
virtual VGPR lanes during SILowerSGPRSpills.
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D124195
Diffstat (limited to 'clang/lib/Lex/ModuleMap.cpp')
0 files changed, 0 insertions, 0 deletions