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| author | Daniel Sanders <daniel.sanders@imgtec.com> | 2014-06-16 13:18:59 +0000 |
|---|---|---|
| committer | Daniel Sanders <daniel.sanders@imgtec.com> | 2014-06-16 13:18:59 +0000 |
| commit | 00463119a5f9cc502c8ddd1f0e8196a3237ef400 (patch) | |
| tree | f6a59f96010a71e0bb5d8ce5b2d1cc0b34de7be3 /clang/lib/Frontend/CompilerInvocation.cpp | |
| parent | 6a803f61621ebcca6f9e1f4244af912cd7fb1540 (diff) | |
| download | llvm-00463119a5f9cc502c8ddd1f0e8196a3237ef400.zip llvm-00463119a5f9cc502c8ddd1f0e8196a3237ef400.tar.gz llvm-00463119a5f9cc502c8ddd1f0e8196a3237ef400.tar.bz2 | |
[mips][mips64r6] cl[oz], and dcl[oz] are re-encoded in MIPS32r6/MIPS64r6
Summary:
There is no change to the restrictions, just the result register is stored
once in the encoding rather than twice. The rt field is zero in
MIPS32r6/MIPS64r6.
Depends on D4119
Reviewers: zoran.jovanovic, jkolek, vmedic
Reviewed By: vmedic
Differential Revision: http://reviews.llvm.org/D4120
llvm-svn: 211019
Diffstat (limited to 'clang/lib/Frontend/CompilerInvocation.cpp')
0 files changed, 0 insertions, 0 deletions