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AgeCommit message (Expand)AuthorFilesLines
2022-01-01Automatic Copyright Year update after running gdb/copyright.pyJoel Brobecker3-3/+3
2021-12-09sim: use ## for automake commentsMike Frysinger1-18/+18
2021-11-28sim: sh: switch to new target-newlib-syscallMike Frysinger2-25/+23
2021-11-15sim: split program path out of argv vectorMike Frysinger1-4/+1
2021-11-13sim: sh: fix switch-bool warningsMike Frysinger1-51/+28
2021-11-13sim: sh: rework carry checks to not rely on integer overflowsMike Frysinger1-4/+4
2021-11-06sim: sh: fix conversion of PC to an integerMike Frysinger1-1/+1
2021-11-06sim: sh: clean up time(NULL) callMike Frysinger1-1/+1
2021-11-06sim: sh: break utime logic out of _WIN32 checkMike Frysinger1-1/+8
2021-11-06sim: sh: drop errno externMike Frysinger1-1/+0
2021-11-06sim: sh: fix isnan redefinition with mingw targetsMike Frysinger1-0/+2
2021-11-06sim: sh: enable -Werror everywhereMike Frysinger1-3/+0
2021-11-06sim: sh: fix uninitialized variable usage with pdmsbMike Frysinger1-1/+1
2021-11-06sim: sh: constify a few read-only lookup tablesMike Frysinger1-6/+6
2021-11-06sim: sh: fix various parentheses warningsMike Frysinger2-11/+11
2021-11-06sim: sh: fix unused-value warningsMike Frysinger1-3/+3
2021-11-06sim: sh: rework register layout with anonymous unions & structsMike Frysinger3-90/+82
2021-11-02sim: hoist gencode & opc2c build rules up to common buildsMike Frysinger2-21/+48
2021-11-01sim: sh: reduce -Wno-error scopeMike Frysinger1-2/+2
2021-10-31sim: tighten up gencode outputMike Frysinger1-5/+5
2021-08-17sim: rename ChangeLog files to ChangeLog-2021Mike Frysinger1-0/+0
2021-06-22sim: drop configure scripts for simple portsMike Frysinger4-2893/+6
2021-06-21sim: unify hardware settingsMike Frysinger3-54/+5
2021-06-21sim: hw: rework configure option & device selectionMike Frysinger2-38/+30
2021-06-20sim: delete SIM_AC_COMMON macroMike Frysinger4-5/+5
2021-06-20sim: unify general maintainer settingsMike Frysinger2-124/+0
2021-06-20sim: move sim-inline to the common codeMike Frysinger3-36/+5
2021-06-19sim: unify gettext/intl probing logicMike Frysinger2-85/+0
2021-06-19sim: unify toolchain dependency logicMike Frysinger2-1109/+1
2021-06-19sim: unify toolchain probing logicMike Frysinger2-1360/+26
2021-06-19sim: unify bfd library dependency testing logicMike Frysinger3-7691/+6
2021-06-19sim: unify various library testing logicMike Frysinger2-141/+6
2021-06-18sim: unify -Werror build settingsMike Frysinger3-112/+6
2021-06-18sim: move -Werror disabling to MakefileMike Frysinger4-5/+13
2021-06-17sim: overhaul & unify endian settings managementMike Frysinger4-57/+8
2021-06-16sim: drop obsolete AC_EXEEXT callMike Frysinger2-2/+4
2021-06-16sim: drop arch-specific config.hMike Frysinger3-280/+47
2021-06-15sim: move dv-sockser define to CPPFLAGSMike Frysinger3-8/+5
2021-06-12sim: overhaul alignment settings managementMike Frysinger5-56/+12
2021-06-12sim: unify bug & package settingsMike Frysinger3-87/+2
2021-06-12sim: unify debug/stdio/trace/profile build settingsMike Frysinger2-150/+2
2021-06-12sim: unify environment build settingsMike Frysinger3-32/+2
2021-06-12sim: unify assert build settingsMike Frysinger4-28/+6
2021-06-12sim: unify platform function & header testsMike Frysinger3-552/+6
2021-05-29sim: sh: fix a few compiler warningsMike Frysinger2-2/+7
2021-05-17sim: fully merge sim_state_base into sim_stateMike Frysinger2-2/+4
2021-05-17sim: invert sim_state storageMike Frysinger2-7/+7
2021-05-16sim: switch config.h usage to defs.hMike Frysinger2-1/+6
2021-05-16sim: riscv: move __int128 check to configureMike Frysinger3-2/+19
2021-05-14sim: create header namespaceMike Frysinger2-2/+6
generated by cgit v1.1 at 2024-11-18 22:16:54 +0000