aboutsummaryrefslogtreecommitdiff
path: root/sim/mn10300
AgeCommit message (Expand)AuthorFilesLines
2000-08-09* am33.igen: Warning clean-up.Alexandre Oliva2-42/+24
2000-05-29minor formatting tweaks to aid syncronisationNick Clifton2-8/+17
2000-05-24Change profiling so that it is enabled by default. Re-generate everything.Andrew Cagney2-157/+172
2000-05-22* am33.igen: Fix leading comments of SP-relative offset insns thatAlexandre Oliva2-7/+11
2000-05-18* mn10300_sim.h (genericAdd, genericSub, genericCmp, genericOr,Alexandre Oliva5-167/+175
2000-04-25* am33.igen (inc4 Rn): Use genericAdd so as to modify flags.Alexandre Oliva2-1/+5
2000-04-09* am33.igen: Make SP-relative offsets unsigned. Add `*am33' forAlexandre Oliva2-11/+34
2000-03-03* build fixFrank Ch. Eigler2-2/+6
1999-12-07import gdb-1999-12-06 snapshotJason Molenda5-0/+9574
1999-09-09import gdb-1999-09-08 snapshotStan Shebs2-168/+176
1999-07-19import gdb-1999-07-19 snapshotJason Molenda2-4/+8
1999-05-11import gdb-1999-05-10Stan Shebs2-184/+318
1999-04-26import gdb-19990422 snapshotStan Shebs6-7/+60
1999-04-16Initial creation of sourceware repositorygdb-4_18-branchpointStan Shebs21-0/+18250
1999-04-16Initial creation of sourceware repositoryStan Shebs21-26548/+0
1999-01-26am33 is now kept with --keep-cygnus.Jeff Law1-11/+11
1999-01-07* Removing last known memories of tx3904 and am30 sanitization.Frank Ch. Eigler1-34/+5
1998-12-30* eCos->devo merge; am30 sanitization tags removedFrank Ch. Eigler3-115/+255
1998-08-26Regress yesterday's change to jmp instn implementation in mn10300.igen.Joyce Janczyn1-5/+0
1998-08-26Regress yesterday's change to jmp instruction -- it has deceiving syntax.Joyce Janczyn2-17/+32
1998-08-25* mn10300.igen (OP_F0F4): Need to load contents of register AN0Joyce Janczyn2-277/+287
1998-08-24* sim-main.h (SIM_HANDLES_LMA): Define SIM_HANDLES_LMA.Joyce Janczyn1-0/+14
1998-07-27 * am33.igen: Detect cases where two operands must not match inJeff Law2-38/+49
1998-07-24Fri Jul 24 18:15:21 1998 Joyce Janczyn <janczyn@cygnus.com>Joyce Janczyn1-0/+10
1998-07-24 * am33.igen (translate_xreg): New function. Use it as needed.Jeff Law2-28/+39
1998-07-23 * am33.igen: Add some missing instructions.Jeff Law2-11/+240
1998-07-23 * am33.igen: Autoincrement loads/store fixes.Jeff Law2-34/+259
1998-07-21 * am33.igen: Add most am33 DSP instructions.Jeff Law2-15/+3540
1998-07-14Fix goof.Jeff Law1-3/+3
1998-07-09 * am33.igen: Fix Z bit for remaining addc/subc instructions.Jeff Law2-40/+53
1998-07-09 * mn10300.igen: Fix Z bit for addc and subc instructions.Jeff Law2-21/+36
1998-07-09 * am33.igen: Add remaining non-DSP instructions.Jeff Law2-20/+690
1998-07-09 * am33.igen (translate_rreg): New function. Use it as appropriate.Jeff Law2-2335/+374
1998-07-08 * am33.igen: More am33 instructions. Fix "div".Jeff Law2-88/+1626
1998-07-06 * mn10300.igen: Add am33 support.Jeff Law2-446/+1365
1998-07-06 * Makefile.in: Use multi-sim to support both a mn10300 and am33Jeff Law2-1/+4
1998-07-06 * am33.igen: Add many more am33 instructions.Jeff Law2-84/+1933
1998-07-01Tweak.Jeff Law1-1/+14
1998-07-01 * am33.igen: New file with some am33 support.Jeff Law3-1/+2344
1998-07-01 * mn10300_sim.h (FETCH24): Define.Jeff Law1-0/+7
1998-06-30 * mn10300_sim.h: Include bfd.hJeff Law3-10/+57
1998-06-25Thu Jun 25 10:12:03 1998 Joyce Janczyn <janczyn@cygnus.com>Joyce Janczyn1-0/+12
1998-06-19Fri Jun 19 11:59:26 1998 Joyce Janczyn <janczyn@cygnus.com>Joyce Janczyn2-1/+6
1998-06-18Thu June 18 14:37:14 1998 Joyce Janczyn <janczyn@cygnus.com>Joyce Janczyn2-3/+19
1998-06-18 * simops.c (syscall): Handle change in opcode # for syscall.Jeff Law1-1/+1
1998-06-16Tue June 16 09:36:21 1998 Joyce Janczyn <janczyn@cygnus.com>Joyce Janczyn1-0/+4
1998-06-14Updates to dv-mn103iop.c, dv-mn103ser.c and inter.cJoyce Janczyn1-0/+5
1998-06-12Fri June 12 16:24:00 1998 Joyce Janczyn <janczyn@cygnus.com>Joyce Janczyn1-0/+6
1998-06-12Add dv-mn103iop.Joyce Janczyn1-1/+1
1998-06-12New file for handling mn1030002 io ports.Joyce Janczyn1-0/+514
generated by cgit v1.1 at 2024-07-12 18:20:27 +0000