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AgeCommit message (Expand)AuthorFilesLines
2000-12-19Fix test for StoreDouble Instruction.Nick Clifton2-12/+17
2000-12-11Add 0x91 as an FPE SWI.Nick Clifton2-0/+5
2000-12-08oops - remove redundant prototype introduced in previous deltaNick Clifton1-2/+0
2000-12-08Add emulation of double word load and store instructions.Nick Clifton2-3/+348
2000-12-03Suppress support of DEMON swi's in XScale mode.Nick Clifton2-71/+109
2000-11-30Add support for ARM's v5TE architecture and Intel's XScale extenstionsNick Clifton10-250/+1763
2000-09-15Replace StrongARM property with v4 and v5 properties.Nick Clifton6-90/+119
2000-08-15Compute write back value for post increment loads beforeNick Clifton2-34/+47
2000-07-142000-07-14 Fernando Nasser <fnasser@cygnus.com>Fernando Nasser2-1/+5
2000-07-142000-07-14 Fernando Nasser <fnasser@cygnus.com>Fernando Nasser2-0/+9
2000-07-04* armvirt.c (ABORTS): Do not define.Alexandre Oliva2-1/+3
2000-07-04* armdefs.h (struct ARMul_State): Add is_StrongARM.Alexandre Oliva5-11/+59
2000-07-04* armemu.c (ARMul_Emulate, t_undefined): Proceed to next insn.Alexandre Oliva2-1/+3
2000-07-04* armemu.h (INSN_SIZE): New macro.Alexandre Oliva4-45/+48
2000-07-04* armemu.c (LoadSMult): Use WriteR15() to discard the leastAlexandre Oliva2-2/+5
2000-07-04* armemu.h (WRITEDESTB): New macro.Alexandre Oliva3-37/+48
2000-07-04* armemu.h (GETSPSR): Call ARMul_GetSPSR().Alexandre Oliva3-4/+18
2000-07-04* armemu.h (PSR_FBITS, PSR_SBITS, PSR_XBITS, PSR_CBITS): New.Alexandre Oliva4-30/+40
2000-07-04* armemu.c (ARMul_Emulate): Compute writeback value beforeAlexandre Oliva2-8/+20
2000-07-04* armdefs.h (SYSTEMBANK): Define as USERBANK.Alexandre Oliva3-8/+6
2000-06-22* armemu.c (Multiply64): Fix computation of flag N.Alexandre Oliva2-4/+5
2000-06-22* armemu.c (MultiplyAdd64): Fix computation of flag N.Alexandre Oliva2-4/+7
2000-06-20* armemu.h (NEGBRANCH): Do not overwrite the two most significantAlexandre Oliva2-1/+6
2000-05-30Add support for v4 SystemMode.Nick Clifton11-57/+159
2000-05-24Change profiling so that it is enabled by default. Re-generate everything.Andrew Cagney2-147/+162
2000-05-23Add special case handling when GDB set CPSR registerNick Clifton2-1/+12
2000-04-10* arm abort fixFrank Ch. Eigler2-3/+8
2000-03-23* memory corruption fixFrank Ch. Eigler2-2/+8
2000-03-02* adding forgotten entryFrank Ch. Eigler1-0/+1
2000-02-08Fix compile time warning messages.Nick Clifton10-669/+109
2000-02-05import gdb-2000-02-04 snapshotJason Molenda27-8246/+9283
2000-01-26import gdb-2000-01-26 snapshotJason Molenda2-5/+20
1999-12-07import gdb-1999-12-06 snapshotJason Molenda3-8/+26
1999-11-02import gdb-1999-11-01 snapshotJason Molenda2-0/+7
1999-10-12import gdb-1999-10-11 snapshotJason Molenda2-1/+7
1999-10-05import gdb-1999-10-04 snapshotJason Molenda2-3/+8
1999-09-09import gdb-1999-09-08 snapshotStan Shebs2-158/+153
1999-07-12import gdb-1999-07-12 snapshotJason Molenda3-1/+3
1999-05-11import gdb-1999-05-10Stan Shebs2-174/+308
1999-04-26import gdb-19990422 snapshotStan Shebs5-8/+76
1999-04-16Initial creation of sourceware repositorygdb-4_18-branchpointStan Shebs36-0/+17817
1999-04-16Initial creation of sourceware repositoryStan Shebs27-10572/+0
1998-12-10Fixes.Jeff Law1-0/+1
1998-09-14define SIM_HAVE_BIENDIANNick Clifton1-0/+29
1998-06-02Allow simulator to work with Angel SWIs.Nick Clifton2-0/+12
1998-06-02Mon Jun 1 17:14:19 1998 Anthony Thompson (athompso@cambridge.arm.com)Jason Molenda2-0/+980
1998-04-29Tue Apr 28 18:28:58 1998 Geoffrey Noer <noer@cygnus.com>Geoffrey Noer1-0/+4
1998-04-26 * configure: Regenerated to track ../common/aclocal.m4 changes.Tom Tromey5-120/+148
1998-04-24 * configure: Regenerated to track ../common/aclocal.m4 changes.Tom Tromey3-36/+1877
1998-01-31Add config support for the size of the target address and OF cell.Andrew Cagney1-0/+4
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