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AgeCommit message (Expand)AuthorFilesLines
1996-09-09 * mips-dis.c (print_insn_arg): Print condition code registers asIan Lance Taylor2-31/+85
1996-09-03 * v850-dis.c (disassemble): Make static. Provide prototype.Jeff Law1-0/+9
1996-09-02whoops--typoIan Lance Taylor1-0/+27
1996-09-02file was really removed a long time agoIan Lance Taylor2-32/+0
1996-08-31 * v850-dis.c (disassemble): Handle insertion of ',', '[' andJeff Law2-80/+89
1996-08-31 * v850-dis.c (print_insn_v850): Properly handle disassemblingJeff Law2-2/+21
1996-08-31 * v850-dis.c (v850_cc_names): Fix stupid thinkos.Jeff Law2-2/+3
1996-08-31 * v850-dis.c (v850_reg_names): Define.Jeff Law3-3/+62
1996-08-31 * v850-dis.c: New file. Skeleton for disassembler support.Jeff Law1-0/+78
1996-08-31 * v850-dis.c: New file. Skeleton for disassembler support.Jeff Law2-2/+9
1996-08-31 * v850-opc.c (insert_d8_7, extract_d8_7): New functions.Jeff Law2-19/+90
1996-08-31 * v850-opc.c (insert_d16_15, extract_d16_15): New functions.Jeff Law2-11/+52
1996-08-31 * v850-opc.c (insert_d9, insert_d22): Slightly improve errorJeff Law2-1/+10
1996-08-31 * v850-opc.c: Add notes about needing special insert/extractJeff Law2-0/+9
1996-08-31 * v850-opc.c (insert_d22, extract_d22): New functions.Jeff Law2-2/+33
1996-08-31* v850-opc.c (v850_operands): Add V850_OPERAND_SIGNED flagJ.T. Conklin2-2/+7
1996-08-30 * v850-opc.c (v850_operands): Define SR2 operand.Jeff Law2-1/+9
1996-08-29 * v850-opc.c (v850_opcodes): Fix opcode specs forJeff Law2-5/+10
1996-08-28 * v850-opc.c (v850_opcodes): Add null opcode to mark theJeff Law2-5/+31
1996-08-26Remove v850-opc.c from things-to-keepJ.T. Conklin1-1/+0
1996-08-23 * v850-opc.c (v850_operands): Define EP operand.Jeff Law2-5/+12
1996-08-23 * v850-opc.c (v850_opcodes): Fix opcode numbers for "mov"Jeff Law2-7/+7
1996-08-23 * v850-opc.c (v850_opcodes): Get ld.[bhw] and st.[bhw]Jeff Law2-9/+12
1996-08-23 * v850-opc.c (v850_operands): "not" is a two byte insn.Jeff Law2-1/+3
1996-08-23 * v850-opc.c (v850_opcodes): Correct bit pattern for setf.Jeff Law2-1/+3
1996-08-23 * v850-opc.c (v850_operands): D16 inserts at offset 16!Jeff Law2-1/+3
1996-08-23 * v850-opc.c (two): Get order of words correct.Jeff Law2-1/+3
1996-08-23 * v850-opc.c (v850_operands): I16 inserts at offset 16!Jeff Law2-1/+3
1996-08-23 * v850-opc.c (v850_operands): Add "SR1" and "SR2" for systemJeff Law2-2/+12
1996-08-23 * v850-opc.c (v850_opcodes): Fix thinko in "jmp" opcode. FixJeff Law2-2/+3
1996-08-23 * v850-opc.c (v850_opcodes): Fix thinko in "jmp" opcode.Jeff Law2-1/+3
1996-08-23 * v850-opc.c (v850_opcodes): Add initializer for size fieldJeff Law2-84/+87
1996-08-23 * v850-opc.c (v850_operands): D6 -> DS7. References changed.Jeff Law2-15/+29
1996-08-23 * v850-opc.c (v850_operansd): 3-bit immediate for bit insnsJeff Law2-1/+4
1996-08-23Add V850_OPERAND_SIGNED flag as appropriate, create new unsigned IMM5 operandJ.T. Conklin1-8/+11
1996-08-23 * v850-opc.c (v850_opcodes): Correct short store half (sst.h) andJeff Law2-1/+6
1996-08-23start writing functions for extracting and inserting unusual operandsJ.T. Conklin1-6/+37
1996-08-23* v850-opc.c (v850_operands): Added insert and extract fields,J.T. Conklin2-15/+22
1996-08-22 * v850-opc.c (v850_opcodes): Enable "trap".Jeff Law2-2/+2
1996-08-22 * v850-opc.c (v850_opcodes): Fix order of displacementJeff Law2-4/+9
1996-08-22minimal setf supportJ.T. Conklin1-1/+3
1996-08-22Stub in load and store insns. Fix order of jarl operandsJ.T. Conklin1-5/+19
1996-08-22Arggh. B3. shift counts are from the start of each half-word apparently.Jeff Law1-1/+1
1996-08-22Fix thinko in B3.Jeff Law1-1/+1
1996-08-22 * v850-opc.c (v850_operands): Add "B3" support.Jeff Law2-8/+14
1996-08-22 * v850-ope.c ("jmp"): R1 is only operand.Jeff Law2-1/+3
1996-08-22 * v850-opc.c: Close unterminated comment.Jeff Law2-1/+5
1996-08-22* v850-opc.c: Add flags field to struct v850_operands, add moveJ.T. Conklin2-22/+35
1996-08-20* Makefile.in (ALL_MACHINES): Add v850-opc.o.J.T. Conklin3-0/+239
1996-08-19 * sparc-dis.c (print_insn_sparc): Handle little endian sparcs.David Edelsohn1-0/+12
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