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2020-02-07Add support for the GBZ80 and Z80N variants of the Z80 architecture, and add ...Sergey Belyashov2-20/+158
2020-02-04ubsan: d30v: negation of -2147483648Alan Modra2-2/+6
2020-02-03ubsan: m32c: left shift of negative valueAlan Modra2-2/+6
2020-02-01ubsan: frv: left shift of negative valueAlan Modra2-3/+7
2020-01-31x86: replace EXxmm_mdq by EXVexWdqScalarJan Beulich3-27/+29
2020-01-31x86: drop unused EXVexWdq / vex_w_dq_modeJan Beulich2-7/+10
2020-01-31aarch64: Fix MOVPRFX markup for bf16 conversionsRichard Sandiford2-2/+7
2020-01-30ubsan: m32c: left shift of negative valueAlan Modra2-12/+16
2020-01-30cpu,opcodes,gas: fix neg and neg32 instructions in BPFJose E. Marchesi2-4/+8
2020-01-30x86-64: honor vendor specifics for near RETJan Beulich4-6/+55
2020-01-30x86: drop further pointless/bogus DefaultSizeJan Beulich3-17/+25
2020-01-30ubsan: tic4x: left shift cannot be represented in type 'int'Alan Modra2-1/+5
2020-01-27x86-64: Properly encode and decode movsxdH.J. Lu4-6/+108
2020-01-27AArch64: Fix cfinv disassembly issuesTamar Christina5-1278/+1293
2020-01-21x86: improve handling of insns with ambiguous operand sizesJan Beulich3-2/+7
2020-01-21x86: VCVTNEPS2BF16{X,Y} should permit broadcastingJan Beulich3-8/+15
2020-01-20Updated translations for various binutils sub-directoriesNick Clifton4-1053/+1365
2020-01-20ubsan: hppa: negation of -2147483648Alan Modra2-1/+5
2020-01-20ubsan: arm: out of bounds array accessAlan Modra2-1/+5
2020-01-18Update version to 2.34.50. Regenerate configure and .pot files.Nick Clifton3-38/+43
2020-01-18Add markers for 2.34 branch to the NEWS files and ChangeLogs.Nick Clifton1-0/+4
2020-01-17Fix spelling errorsChristian Biesinger2-1/+5
2020-01-17x86: Add {vex} pseudo prefixH.J. Lu3-0/+18
2020-01-16[binutils][arm] PR25376 Change MVE into a CORE_HIGH featureAndre Vieira2-232/+248
2020-01-16x86: drop stale Vec_Imm4 related commentJan Beulich2-2/+4
2020-01-16x86: add a few more missing VexWIGJan Beulich3-8/+14
2020-01-16x86: VPEXTRQ/VPINSRQ are unavailable outside of 64-bit modeJan Beulich3-20/+28
2020-01-16tic4x disassembly static variablesAlan Modra2-31/+54
2020-01-14Fix various assembler testsuite failures for the Z80 target.Sergey Belyashov2-1/+7
2020-01-14ubsan: z8k: left shift cannot be represented in type 'int'Alan Modra2-8/+13
2020-01-13Add an option to objdump's disassembler to generate ascii art diagrams showin...Thomas Troeger3-4/+113
2020-01-13[ARC][committed] Code cleanup and improvements.Claudiu Zissulescu2-1/+5
2020-01-13[ARC] [COMMITTED] Change ACCL/ACCH reg name to generic.Claudiu Zissulescu2-1/+6
2020-01-13asan: ns32k: wild memory writeAlan Modra2-6/+10
2020-01-13ubsan: wasm32: signed integer overflowAlan Modra2-209/+243
2020-01-13score formattingAlan Modra3-812/+808
2020-01-13ubsan: score: left shift of negative valueAlan Modra3-24/+31
2020-01-13tic4x: sign extension using shiftsAlan Modra2-2/+5
2020-01-13ubsan: fr30: left shift of negative valueAlan Modra2-5/+9
2020-01-13ubsan: xgate: left shift of negative valueAlan Modra2-8/+13
2020-01-10ubsan: tilepro: signed integer overflowAlan Modra3-11/+10
2020-01-10ubsan: m10300: shift exponent -4Alan Modra3-30/+24
2020-01-09Fix the cast used to prevent compile time warning about an always false test.Nick Clifton2-1/+6
2020-01-09Fix compile time warnings about comparisons always being false.Sergey Belyashov2-7/+13
2020-01-09x86: SYSENTER/SYSEXIT are unavailable in 64-bit mode on AMDJan Beulich4-10/+61
2020-01-08ubsan: z8k: index 10 out of bounds for type 'unsigned int const[10]'Alan Modra4-11/+26
2020-01-07[ARC] Add finer details for LLOCK and SCONDShahab Vahedi2-21/+30
2020-01-06ubsan: m32c: left shift of negative valueAlan Modra2-61/+65
2020-01-06PR25344, z80 disassembler recursionAlan Modra2-29/+40
2020-01-04ubsan: m32r: left shift of negative valueAlan Modra2-3/+7
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