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2024-10-31RISC-V: Dump instruction without checking architecture support as usual.Nelson Chu1-1/+7
2024-10-30x86/APX: support JMPABS also in assemblerJan Beulich3-903/+924
2024-10-29x86: use <xyz> for VFPCLASSP{S,D}Jan Beulich2-35/+31
2024-10-18x86: Regenerate missing table filesMayShao-oc3-4388/+4428
2024-10-18x86: Support x86 ZHAOXIN GMI instructionsMayShao-oc4-1/+56
2024-10-16Support Intel AVX10.2 convert instructionsLiwei Xu6-1996/+2488
2024-10-14x86: also template-expand trailing mnemonic partJan Beulich1-60/+72
2024-10-14LoongArch: Fixed R_LARCH_[32/64]_PCREL generation bugLulu Cai1-1/+2
2024-10-11Support Intel AVX10.2 media instructionsHaochen Jiang7-702/+893
2024-10-10s390: Add arch15 instructionsAndreas Krebbel3-3/+127
2024-10-07m68k: Support for jump visualization in disassemblyAndreas Schwab1-0/+27
2024-09-27RISC-V: correct alignment directive handling for text sectionsJan Beulich1-1/+1
2024-09-27x86: optimize {,V}INSERTPS with certain immediatesJan Beulich2-7/+7
2024-09-27x86: optimize {,V}EXTRACT{F,I}{128,32x{4,8},64x{2,4}} with immediate 0Jan Beulich2-20/+20
2024-09-27x86: optimize {,V}EXTRACTPS with immediate 0Jan Beulich2-12/+12
2024-09-26x86: templatize SIMD narrowing-move templatesJan Beulich2-72/+32
2024-09-26x86: templatize SIMD sign-/zero-extension templatesJan Beulich2-251/+220
2024-09-26x86: templatize SIMD FP binary-logic templatesJan Beulich2-282/+271
2024-09-26x86: further templatize FMA templatesJan Beulich2-349/+339
2024-09-26x86: templatize SIMD FP arithmetic templatesJan Beulich2-1135/+1100
2024-09-18x86/APX: Don't promote AVX/AVX2 instructions out of APX specH.J. Lu2-337/+197
2024-09-12s390: Relax risbg[n]z, risb{h|l}gz, {rns|ros|rxs}bgt operand constraintsJens Remus1-15/+9
2024-09-12s390: Simplify (dis)assembly of insn operands with const bitsJens Remus2-23/+17
2024-09-11x86/APX: correct disassembly for EVEX.B4Jan Beulich1-2/+3
2024-09-09s390: Align opcodes to lower-caseJens Remus1-1/+1
2024-09-06x86/APX: use D for 2-operand CFCMOVccJan Beulich2-577/+276
2024-09-06x86/APX: optimize certain reg-only CFCMOVcc formsJan Beulich2-31/+31
2024-09-06x86: templatize VNNI templatesJan Beulich2-46/+37
2024-09-03RISC-V: Add support for XCVsimd extension in CV32E40PMary Bennett2-0/+231
2024-09-02Support ymm rounding control for Intel AVX10.2Haochen Jiang6-629/+666
2024-08-30x86/APX: drop %SW disassembler macro againJan Beulich2-17/+19
2024-08-30x86: limit RegRex64 useJan Beulich2-48/+48
2024-08-27RISC-V: PR32036, Support Zcmp cm.mva01s and cm.mvsa01 instructions.Jiawei2-0/+28
2024-08-16opcodes/cgen: drop trailing whitespace also for crisJan Beulich2-48/+48
2024-08-12Revert "gas: have scrubber retain more whitespace"H.J. Lu14-447/+234
2024-08-09gas: have scrubber retain more whitespaceJan Beulich14-234/+447
2024-08-09gas: sparc: Fix faligndatai assembly and disassemblyRichard Henderson1-1/+1
2024-08-06RISC-V: map zext.h to pack/packw if Zbkb is enabledHau Hsu1-2/+2
2024-08-06RISC-V: Add support for XCvBitmanip extension in CV32E40PMary Bennett2-0/+27
2024-08-06RISC-V: Add support for Zcmop extensionXiao Zeng1-0/+10
2024-08-06RISC-V: Add support for Zimop extensionXiao Zeng1-0/+42
2024-07-29Updated translations for the bfd, binutils, gas, ld and opcodes directoriesNick Clifton3-557/+573
2024-07-26microMIPS: Add MT ASE instruction set supportYunQiang Su2-1/+61
2024-07-26x86/APX: optimize certain {nf}-form insns to BMI2 onesJan Beulich2-27/+27
2024-07-26ARM print_insn_mve assertionAlan Modra1-17/+2
2024-07-24opcodes/x86: fix minor missed styling caseAndrew Burgess1-2/+2
2024-07-20Change version to 2.43.50Nick Clifton2-193/+195
2024-07-20Add markers for 2.43 branch/releaseNick Clifton1-0/+4
2024-07-19MIPS/opcodes: Replace "y" microMIPS operand code with "x"Maciej W. Rozycki1-2/+2
2024-07-19MIPS/opcodes: Mark MT thread context move assembly idioms as aliasesMaciej W. Rozycki1-38/+38