aboutsummaryrefslogtreecommitdiff
path: root/opcodes
AgeCommit message (Collapse)AuthorFilesLines
2004-01-282004-01-27 Michael Snyder <msnyder@redhat.com>Michael Snyder2-1/+5
* sh-opc.h (sh_table): "fsrra", not "fssra".
2004-01-23Tighten constaints on a few sparc instructionsNick Clifton1-0/+5
2004-01-18* sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.Jakub Jelinek2-7/+11
2004-01-18 * i386-dis.c (OP_E): Print scale factor on intel mode sib when notAlan Modra2-5/+6
1. Don't print scale factor on AT&T mode when index missing.
2004-01-16* m10300-opc.c (mov): 8- and 24-bit immediates are zero-extendedAlexandre Oliva2-3/+8
when loaded into XR registers.
2004-01-14cpu/Richard Sandiford4-6/+16
* frv.cpu (UNIT): Add IACC. (iacc-multiply-r-r): Use it. * frv.opc (fr400_unit_mapping): Add entry for IACC. (fr500_unit_mapping, fr550_unit_mapping): Likewise. opcodes/ * frv-desc.h: Regenerate. * frv-desc.c: Regenerate. * frv-opc.c: Regenerate.
2004-01-132004-01-13 Michael Snyder <msnyder@redhat.com>Michael Snyder2-1/+5
* sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
2004-01-09 * gas/config/tc-arm.c (do_vfp_reg2_from_sp2): Rename fromPaul Brook2-3/+7
do_vfp_sp_reg2. (do_vfp_sp2_from_reg2): New function. (insns): Use them. (do_vfp_dp_from_reg2): Check return values properly. * opcodes/arm-opc.h (arm_opcodes): Move generic mcrr after known specific opcodes. * gas/testsuite/gas/arm/vfp2.s, gas/arm/vfp2.d: New test. * gas/testsuite/gas/arm/arm.exp: Add them.
2004-01-07 * Makefile.am (libopcodes_la_DEPENDENCIES)Daniel Jacobowitz3-7/+24
(libopcodes_la_LIBADD): Revert 2003-05-17 change. Add explanatory comment about the problem. * Makefile.in: Regenerate.
2004-01-062003-12-19 Alexandre Oliva <aoliva@redhat.com>Alexandre Oliva2-1/+293
* frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some cut&paste errors in shifting/truncating numerical operands. 2003-08-04 Alexandre Oliva <aoliva@redhat.com> * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo. (parse_uslo16): Likewise. (parse_uhi16): Parse gotoffhi and gotofffuncdeschi. (parse_d12): Parse gotoff12 and gotofffuncdesc12. (parse_s12): Likewise. 2003-08-04 Alexandre Oliva <aoliva@redhat.com> * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo. (parse_uslo16): Likewise. (parse_uhi16): Parse gothi and gotfuncdeschi. (parse_d12): Parse got12 and gotfuncdesc12. (parse_s12): Likewise.
2004-01-02Catch a bug in the msp430 disassembler where an add instruction was confusedNick Clifton2-1/+9
with an rla instruction. Add a test for this to the testsuite.
2004-01-02Split ChangeLog files.Alan Modra3-4318/+4335
2003-12-15 * z8k-dis.c (intr_names): Removed.Christian Groessler2-14/+61
(print_intr, print_flags): New functions. (unparse_instr): Use new functions.
2003-12-15Add PIPE_O attribute to "pop" instruction.Nick Clifton2-1/+5
2003-12-15 * arm-opc.h (arm_opcodes): Put V6 instructions before XScaleMark Mitchell2-64/+69
instructions.
2003-12-13 * mmix-opc.c (mmix_opcodes): Use GO_INSN_BYTE, PUSHGO_INSN_BYTE,Hans-Peter Nilsson2-8/+21
SETL_INSN_BYTE, INCH_INSN_BYTE, INCMH_INSN_BYTE, INCML_INSN_BYTE and SWYM_INSN_BYTE instead of raw numbers.
2003-12-10opcodes:Zack Weinberg2-6/+23
* ppc-opc.c (MO): Make optional. (RAO, RSO, SHO): New optional forms of RA, RS, SH operands. (tlbwe): Accept for both PPC403 and BOOKE. Make all operands optional. gas: * tc-ppc.c (md_assemble): Rewrite comment about optional operands to indicate that 'all or none' is also handled. Pluralize a word in another comment. gas/testsuite: * gas/ppc/booke.s: Add two more forms of the mbar instruction and three forms of the tlbwe instruction. * gas/ppc/booke.d: Update to match.
2003-12-06 * gas/arm/arm.exp: Add archv6 and thumbv6.Mark Mitchell3-0/+158
* gas/arm/archv6.d: New file. * gas/arm/archv6.s: Likewise. * gas/arm/thumbv6.d: Likewise. * gas/arm/thumbv6.s: Likewise. Add V6 support. * config/tc-arm.c (ARM_EXT_V6): New macro. (ARM_ARCH_V6): Likewise. (SHIFT_IMMEDIATE): Likewise. (SHIFT_LSL_OR_ASR_IMMEDIATE): Likewise. (SHIFT_ASR_IMMEDIATE): Likewise. (SHIFT_LSL_IMMMEDIATE): Likewise. (do_cps): New function. (do_cpsi): Likewise. (do_ldrex): Likewise. (do_pkhbt): Likewise. (do_pkhtb): Likewise. (do_qadd16): Likewise. (do_rev): Likewise. (do_rfe): Likewise. (do_sxtah): Likewise. (do_sxth): Likewise. (do_setend): Likewise. (do_smlad): Likewise. (do_smlald): Likewise. (do_smmul): Likewise. (do_ssat): Likewise. (do_usat): Likewise. (do_srs): Likewise. (do_ssat16): Likewise. (do_usat16): Likewise. (do_strex): Likewise. (do_umaal): Likewise. (do_cps_mode): Likewise. (do_cps_flags): Likewise. (do_endian_specifier): Likewise. (do_pkh_core): Likewise. (do_sat): Likewise. (do_sat16): Likewise. (insns): Add V6 instructions. (do_t_cps): New function. (do_t_cpy): Likewise. (do_t_setend): Likewise. (THUMB_CPY): New macro. (tinsns): Add V6 instructions. (decode_shift): Handle V6 restricted-shift options. (thumb_mov_compare): Support CPY. (arm_cores): Add arm1136js and arm1136jfs. (arm_archs): Add armv6. (arm_fpus): Add arm1136jfs. * doc/c-arm.texi (ARM Options): Mention arm1136js, arm1136jfs, and armv6 options. * gas/arm/arm.exp: Add archv6 and thumbv6. * gas/arm/archv6.d: New file. * gas/arm/archv6.s: Likewise. * gas/arm/thumbv6.d: Likewise. * gas/arm/thumbv6.s: Likewise. * arm-dis.c (print_arm_insn): Add 'W' macro. * arm-opc.h (arm_opcodes): Add V6 instructions. (thumb_opcodes): Likewise.
2003-12-052003-12-02 Alexandre Oliva <aoliva@redhat.com>Michael Snyder1-0/+5
* sh-opc.h: Add support for sh4a and no-fpu variants. * sh-dis.c: Ditto.
2003-12-052003-12-02 Alexandre Oliva <aoliva@redhat.com>Michael Snyder2-51/+267
* sh-opc.h: Add support for sh4a and no-fpu variants. * sh-dis.c: Ditto.
2003-12-04 * openrisc-asm.c: Regenerate.Alan Modra3-25/+47
* pj-opc.c: Update copyright date.
2003-12-03Add support for the M32R2 processor.Nick Clifton9-175/+528
2003-12-03 * alpha-opc.c: Remove ARGSUSED.Kazu Hirata4-35/+6
* i370-opc.c: Likewise. * ppc-opc.c: Likewise.
2003-12-02make "dep-am"Alan Modra3-11/+16
2003-11-28 * z8k-dis.c: Convert to ISO C90.Christian Groessler4-295/+266
* z8kgen.c: Convert to ISO C90. (opt): Move long opcode for "ldb rdb,imm8" after short one, now the short one is created when assembling. * z8k-opc.h: Regenerate with new z8kgen.c.
2003-11-19 * h8300-dis.c (print_colon_thingie): Remove.Kazu Hirata2-19/+4
2003-11-18* config/tc-mips.c (macro): Handle new macros: "lca" and "dlca"Maciej W. Rozycki2-0/+7
for loading addresses using CALL relocations. Don't emit CALL relocations when a base register is used. * gas/mips/lca-svr4pic.d: New test for the "lca" macro. * gas/mips/lca-xgot.d: Likewise. * gas/mips/lca.s: Source for the new tests. * gas/mips/mips.exp: Run the new tests. * opcode/mips.h: Define new enum members, M_LCA_AB and M_DLCA_AB. * mips-opc.c (mips_builtin_opcodes): Handle new macros: "lca" and "dlca".
2003-11-14Add new field to disassemble_info structure: symbol_is_valid() and use it toNick Clifton5-1/+59
skip displaying arm elf mapping symbols in disassembly output.
2003-11-062003-11-05 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2-4/+8
* m68k-opc.c (m68k_opcodes): Reorder "fmovel".
2003-11-03 * arm-dis.c (print_arm_insn): Print "-" after "#".Daniel Jacobowitz2-8/+12
2003-10-30Add second argument to rcpp instruction.Nick Clifton2-2/+7
2003-10-27 * m68hc11-dis.c: Convert to ISO C90 prototypes.Stephane Carrez2-31/+19
2003-10-21Add ColfFire v4 supportNick Clifton3-276/+522
2003-10-102003-06-03 Michael Snyder <msnyder@redhat.com>Michael Snyder1-1/+2
and Bernd Schmidt <bernds@redhat.com> and Alexandre Oliva <aoliva@redhat.com> * disassemble.c (disassembler): Add support for h8300sx.
2003-10-102003-10-10 Dave Brolley <brolley@redhat.com>Dave Brolley5-74/+67
* frv-asm.c,frv-desc.c,frv-opc.c: Regenerated.
2003-10-082003-10-08 Dave Brolley <brolley@redhat.com>Dave Brolley5-1250/+1634
* frv-desc.[ch], frv-opc.[ch]: Regenerated.
2003-10-01 * xtensa-dis.c (fetch_data): Remove numBytes parameter.Bob Wilson2-6/+9
(print_insn_xtensa): Fix call to fetch_data.
2003-09-30[ bfd/ChangeLog ]Chris Demetriou3-3/+52
2003-09-30 Chris Demetriou <cgd@broadcom.com> * archures.c (bfd_mach_mipsisa64r2): New define. * bfd-in2.h: Regenerate. * aoutx.h (NAME(aout,machine_type)): Handle bfd_mach_mipsisa64r2. * cpu-mips.c (I_mipsisa64r2): New enum value. (arch_info_struct): Add entry for I_mipsisa64r2. * elfxx-mips.c (_bfd_elf_mips_mach) (_bfd_mips_elf_print_private_bfd_data): Handle E_MIPS_ARCH_64R2. (mips_set_isa_flags): Add bfd_mach_mipsisa64r2 case. (mips_mach_extensions): Add entry for bfd_mach_mipsisa64r2. [ binutils/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * readelf.c (get_machine_flags): Handle E_MIPS_ARCH_64R2. [ gas/Changelog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * configure.in (mipsisa64r2, mipsisa64r2el, mipsisa64r2*): New CPUs. * configure: Regenerate. * config/tc-mips.c (imm2_expr): New variable. (md_assemble, mips16_ip): Initialize imm2_expr. (ISA_HAS_64BIT_REGS, ISA_HAS_DROR, ISA_HAS_ROR): Add ISA_MIPS64R2. (macro_build): Handle +A, +B, +C, +E, +F, +G, and +H format operands. (macro): Handle M_DEXT and M_DINS. (validate_mips_insn): Handle +E, +F, +G, +H, and +I format operands. (mips_ip): Likewise. (OPTION_MIPS64R2): New define. (md_longopts): New entry for -mips64r2 (OPTION_MIPS64R2). OPTION_ASE_BASE): Increase to compensate for OPTION_MIPS64R2. (md_parse_option): Handle OPTION_MIPS64R2. (s_mipsset): Handle setting "mips64r2" ISA. (mips_cpu_info_table): Add mips64r2. (md_show_usage): Document -mips64r2 option. * doc/as.texinfo: Docuemnt -mips64r2 option. * doc/c-mips.texi: Likewise. [ gas/testsuite/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * gas/mips/cp0-names-mips64r2.d: New file. * gas/mips/cp0sel-names-mips64r2.d: New file. * gas/mips/elf_arch_mips64r2.d: New file. * gas/mips/hwr-names-mips64r2.d: New file. * gas/mips/mips32r2-ill-fp64.l: New file. * gas/mips/mips32r2-ill-fp64.s: New file. * gas/mips/mips64r2-ill.l: New file. * gas/mips/mips64r2-ill.s: New file. * gas/mips/mips64r2.d: New file. * gas/mips/mips64r2.s: New file. * gas/mips/mips.exp: Define "mips64r2" arch, and run new tests. [ include/elf/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * mips.h (E_MIPS_ARCH_64R2): New define. [ include/opcode/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * mips.h: Document +E, +F, +G, +H, and +I operand types. Update documentation of I, +B and +C operand types. (INSN_ISA64R2, ISA_MIPS64R2, CPU_MIPS64R2): New defines. (M_DEXT, M_DINS): New enum values. [ ld/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * ldmain.c (get_emulation): Ignore "-mips64r2". [ ld/testsuite/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * ld-mips-elf/mips-elf-flags.exp: Add tests for combinations with MIPS64r2. [ opcodes/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * mips-dis.c (mips_arch_choices): Add entry for "mips64r2" (print_insn_args): Add handing for +E, +F, +G, and +H. * mips-opc.c (I65): New define for MIPS64r2. (mips_builtin_opcodes): Add "dext", "dextm", "dextu", "dins", "dinsm", "dinsu", "drotl", "drotr", "drotr32", "drotrv", "dsbh", and "dshd" for MIPS64r2. Adjust "dror", "dror32", and "drorv" to be supported on MIPS64r2.
2003-09-242003-09-24 Dave Brolley <brolley@redhat.com>Dave Brolley4-157/+149
* frv-desc.c, frv-opc.c, frv-opc.h: Regenerated.
2003-09-14 * i386-dis.c: Convert to ISO C90 prototypes.Andreas Jaeger6-380/+231
* i370-dis.c: Likewise. * i370-opc.c: Likewiwse. * i960-dis.c: Likewise. * ia64-opc.c: Likewise.
2003-09-092003-09-09 Dave Brolley <brolley@redhat.com>Dave Brolley2-6/+10
* frv-desc.c: Regenerated.
2003-09-082003-09-08 Dave Brolley <brolley@redhat.com>Dave Brolley4-31/+60
On behalf of Doug Evans <dje@sebabeach.org> * Makefile.am (run-cgen): Pass new args archfile and opcfile to cgen.sh. (stamp-ip2k,stamp-m32r,stamp-fr30,stamp-frv,stamp-openrisc, stamp-iq2000,stamp-xstormy16): Pass paths of .cpu and .opc files to cgen.sh. (stamp-frv): Delete hardcoded path spec workaround. * Makefile.in: Regenerate. * cgen.sh: New args archfile and opcfile. Pass on to cgen.
2003-09-04Add binutils support for v850e1 processorNick Clifton3-76/+91
2003-09-04 * ppc-dis.c (struct dis_private): New.Alan Modra3-59/+88
(powerpc_dialect): Make static. Accept -Many in addition to existing options. Save dialect in dis_private. (print_insn_big_powerpc): Retrieve dialect from dis_private. (print_insn_little_powerpc): Likewise. (print_insn_powerpc): Call powpc_dialect here. Remove unnecessary efs/altivec check. Try harder to disassemble if given -Many. * ppc-opc.c (insert_fxm): Expand comment. (PPC, PPCCOM, PPC32, PPC64, PPCVEC): Remove PPC_OPCODE_ANY. (POWER, POWER2, PPCPWR2, POWER32, COM, COM32, M601, PWRCOM): Likewise. (POWER4): Remove PPCCOM. (PPCONLY): Don't define. Update all occurrences to PPC.
2003-09-03Index: opcodes/ChangeLogAndrew Cagney4-3/+58
2003-09-03 Andrew Cagney <cagney@redhat.com> * dis-init.c (init_disassemble_info): New file and function. * Makefile.am (CFILES): Add "dis-init.c". (libopcodes_la_SOURCES): Add "dis-init.c". (dis-init.lo): Specify dependencies. * Makefile.in: Regenerate. Index: include/ChangeLog 2003-08-27 Andrew Cagney <cagney@redhat.com> * dis-asm.h (init_disassemble_info): Declare. (INIT_DISASSEMBLE_INFO): Redefine as a call to init_disassemble_info. (INIT_DISASSEMBLE_INFO_NO_ARCH): Ditto. Index: binutils/ChangeLog 2003-09-03 Andrew Cagney <cagney@redhat.com> * objdump.c: Refer to init_disassemble_info in comments. (disassemble_data): Replace INIT_DISASSEMBLE_INFO with init_disassemble_info.
2003-09-032003-09-03 Dave Brolley <brolley@redhat.com>Dave Brolley8-319/+443
* frv-*: Regenerated.
2003-09-02 * ppc-opc.c (powerpc_opcodes): Combine identical PPC403/BOOKE entries.Alan Modra3-243/+223
Move duplicate mnemonic entries together. Use RS instead of RT on all mt*. * ppc-dis.c: Convert to ISO C.
2003-08-292003-08-29 Dave Brolley <brolley@redhat.com>Dave Brolley3-6/+24
* Makefile.am (stamp-frv): Copy frv.cpu and frv.opc from $(srcdir)/../cpu temporarily when regenerating source files. * Makefile.in: Regenerated.
2003-08-19Add support for unindexed form of Addressing Mode 5Nick Clifton2-6/+19
2003-08-19 * ppc-opc.c (PPC440): Define.Alan Modra2-88/+98
(powerpc_opcodes): Allow mac*, mul*, nmac*, dccci, dcread, iccci, icread instructions when PPC440. Add dlmzb instruction.