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authorMaciej W. Rozycki <macro@linux-mips.org>2003-11-18 21:22:57 +0000
committerMaciej W. Rozycki <macro@linux-mips.org>2003-11-18 21:22:57 +0000
commit1abe91b1db3777cfb5ed135baa33e16c7744abfd (patch)
tree41fbff7437dc55eab52e797ec43524ae21dece2c /opcodes
parent5659daa1d9d69b21490a7624abaa6f88e9e33f31 (diff)
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* config/tc-mips.c (macro): Handle new macros: "lca" and "dlca"
for loading addresses using CALL relocations. Don't emit CALL relocations when a base register is used. * gas/mips/lca-svr4pic.d: New test for the "lca" macro. * gas/mips/lca-xgot.d: Likewise. * gas/mips/lca.s: Source for the new tests. * gas/mips/mips.exp: Run the new tests. * opcode/mips.h: Define new enum members, M_LCA_AB and M_DLCA_AB. * mips-opc.c (mips_builtin_opcodes): Handle new macros: "lca" and "dlca".
Diffstat (limited to 'opcodes')
-rw-r--r--opcodes/ChangeLog5
-rw-r--r--opcodes/mips-opc.c2
2 files changed, 7 insertions, 0 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 5918252..52845fa 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,8 @@
+2003-11-18 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
+
+ * mips-opc.c (mips_builtin_opcodes): Handle new macros: "lca" and
+ "dlca".
+
2003-11-14 Nick Clifton <nickc@redhat.com>
* dis-init.c (init_disassemble_info): Initialise
diff --git a/opcodes/mips-opc.c b/opcodes/mips-opc.c
index 340a084..9a80e53 100644
--- a/opcodes/mips-opc.c
+++ b/opcodes/mips-opc.c
@@ -517,6 +517,7 @@ const struct mips_opcode mips_builtin_opcodes[] =
{"divu", "d,v,t", 0, (int) M_DIVU_3, INSN_MACRO, I1 },
{"divu", "d,v,I", 0, (int) M_DIVU_3I, INSN_MACRO, I1 },
{"dla", "t,A(b)", 0, (int) M_DLA_AB, INSN_MACRO, I3 },
+{"dlca", "t,A(b)", 0, (int) M_DLCA_AB, INSN_MACRO, I3 },
{"dli", "t,j", 0x24000000, 0xffe00000, WR_t, I3 }, /* addiu */
{"dli", "t,i", 0x34000000, 0xffe00000, WR_t, I3 }, /* ori */
{"dli", "t,I", 0, (int) M_DLI, INSN_MACRO, I3 },
@@ -640,6 +641,7 @@ const struct mips_opcode mips_builtin_opcodes[] =
{"lb", "t,A(b)", 0, (int) M_LB_AB, INSN_MACRO, I1 },
{"lbu", "t,o(b)", 0x90000000, 0xfc000000, LDD|RD_b|WR_t, I1 },
{"lbu", "t,A(b)", 0, (int) M_LBU_AB, INSN_MACRO, I1 },
+{"lca", "t,A(b)", 0, (int) M_LCA_AB, INSN_MACRO, I1 },
{"ld", "t,o(b)", 0xdc000000, 0xfc000000, WR_t|RD_b, I3 },
{"ld", "t,o(b)", 0, (int) M_LD_OB, INSN_MACRO, I1 },
{"ld", "t,A(b)", 0, (int) M_LD_AB, INSN_MACRO, I1 },