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AgeCommit message (Expand)AuthorFilesLines
2023-08-26Simplify definition of GUILETom Tromey1-0/+6
2023-08-02Revert "2.41 Release sources"Sam James1-4/+45
2023-08-022.41 Release sourcesbinutils-2_41-releaseNick Clifton1-45/+4
2023-07-31bpf: opcodes: fix regression in BPF disassemblerJose E. Marchesi1-0/+6
2023-07-30bpf: include, bfd, opcodes: add EF_BPF_CPUVER ELF header flagsJose E. Marchesi1-0/+7
2023-07-26bpf: fix register NEG[32] instructionsJose E. Marchesi1-0/+5
2023-07-24bpf: gas,include,opcode: add suppor for instructions BSWAP{16,32,64}Jose E. Marchesi1-0/+5
2023-07-24bpf: gas,opcodes: fix pseudoc syntax for MOVS* and LDXS* insnsJose E. Marchesi1-0/+5
2023-07-24bpf: add support for jal/gotol jump instruction with 32-bit targetJose E. Marchesi1-0/+4
2023-07-21bpf: opcodes, gas: support for signed load V4 instructionsJose E. Marchesi1-0/+5
2023-07-21bpf: opcodes, gas: support for signed register move V4 instructionsJose E. Marchesi1-0/+5
2023-07-21bpf: add missing bpf-dis.c to opcodes/Makefile.amJose E. Marchesi1-0/+5
2023-07-03Change version number to 2.41.50 and regenerate filesNick Clifton1-0/+5
2023-07-03Add markers for the 2.41 branchNick Clifton1-0/+4
2023-05-23Updated Swedish translation for the opcodes directoryNick Clifton1-0/+4
2023-04-21Fix -Wmaybe-uninitialized warning in opcodes/i386-dis.cTom Tromey1-0/+4
2023-04-12arc: remove faulty instructionsClaudiu Zissulescu1-0/+6
2023-04-11Fix illegal memory access when disassembling corrupt NFP binaries.Nick Clifton1-0/+6
2023-03-15Fix an illegal memory access when disassembling a corrupt MeP file.Nick Clifton1-0/+5
2023-03-15Fix an illegal memory access when disassebling a corrupt ARM file.Nick Clifton1-0/+5
2023-02-28[Aarch64] Add Binutils support for MECRichard Ball1-0/+4
2023-01-03Updated translations for various languages and sub-directoriesNick Clifton1-0/+6
2023-01-01Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2022-12-31Add markers for 2.40 branchNick Clifton1-0/+4
2022-11-22opcodes: Correct address for ARC's "isa_config" aux regShahab Vahedi1-0/+5
2022-10-31RX assembler: switch arguments of thw MVTACGU insn.Yoshinori Sato1-0/+5
2022-09-22opcodes: SH fix bank register disassemble.Yoshinori Sato1-0/+5
2022-07-21Add ChangeLog entry from previous commitPeter Bergner1-0/+10
2022-07-18opcodes/arc: Implement style support in the disassemblerClaudiu Zissulescu1-0/+10
2022-07-08Add markers for 2.39 branchNick Clifton1-0/+4
2022-07-04opcodes/avr: Implement style support in the disassemblerMarcus Nilsson1-0/+9
2022-04-07IBM zSystems: Add support for z16 as CPU name.Andreas Krebbel1-0/+5
2022-03-16opcodes: handle bfd_amdgcn_arch in configure scriptSimon Marchi1-0/+5
2022-03-06MIPS/opcodes: Fix alias annotation for branch instructionsMaciej W. Rozycki1-0/+8
2022-02-17Updated Serbian translations for the bfd, gold, ld and opcodes directoriesNick Clifton1-0/+4
2022-02-14microblaze: fix fsqrt collicion to build on glibc-2.35Sergei Trofimovich1-0/+5
2022-01-24Update Bulgarian, French, Romaniam and Ukranian translation for some of the s...Nick Clifton1-0/+5
2022-01-22Change version number to 2.38.50 and regenerate filesNick Clifton1-0/+5
2022-01-22Add markers for 2.38 branchNick Clifton1-0/+4
2022-01-17Update the config.guess and config.sub files from the master repository and r...Nick Clifton1-0/+5
2022-01-02Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2021-12-02Allow the --visualize-jumps feature to work with the AVR disassembler.Marcus Nilsson1-0/+5
2021-11-26opcodes/riscv: add disassembler options support to libopcodesAndrew Burgess1-0/+9
2021-11-25Fix building the AArch64 assembler and disassembler when assertions are disab...Nick Clifton1-0/+7
2021-11-25Updated French translation for the opcodes directory.Nick Clifton1-0/+4
2021-10-27opcodes: Fix RPATH not being set for dynamic libbfd dependencyMaciej W. Rozycki1-0/+8
2021-09-27configure: regenerate in all projects that use libtool.m4Nick Alcock1-0/+4
2021-09-25PowerPC: Enable mfppr mfppr32, mtppr and mtppr32 extended mnemonics on POWER5Peter Bergner1-0/+5
2021-09-20riscv: print .2byte or .4byte before an unknown instruction encodingAndrew Burgess1-0/+6
2021-09-02Fix the V850 assembler's generation of relocations for the st.b instruction.Nick Clifton1-0/+6