riscv-gnu-toolchain/gdb.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2018-11-30	gdb/riscv: Create each unique target description only once	Andrew Burgess	2	-0/+40
2018-11-30	gdb/riscv: Add equality operators to riscv_gdb_features	Andrew Burgess	1	-0/+13
2018-11-30	gdb/riscv: Make some target description functions constant	Andrew Burgess	2	-2/+2
2018-11-21	gdb/riscv: Add target description support	Andrew Burgess	2	-0/+133
2018-10-26	[PowerPC] Add support for HTM registers	Edjunior Barbosa Machado	3	-2/+17
2018-10-26	[PowerPC] Add support for EBB and PMU registers	Edjunior Barbosa Machado	1	-0/+2
2018-10-26	[PowerPC] Add support for TAR	Edjunior Barbosa Machado	3	-2/+9
2018-10-26	[PowerPC] Add support for PPR and DSCR	Edjunior Barbosa Machado	3	-2/+10
2018-10-26	[PowerPC] Fix indentation in arch/ppc-linux-common.c	Pedro Franco de Carvalho	1	-12/+12
2018-10-04	Simple -Wshadow=local fixes	Tom Tromey	1	-4/+4
2018-10-01	Aarch64: Move pseudo defines to header	Alan Hayward	1	-0/+8
2018-08-27	Use CORE_ADDR_MAX in various "breaks" arrays	Tom Tromey	1	-2/+2
2018-08-22	Aarch64 SVE VG is Vector Granule	Alan Hayward	1	-2/+2
2018-06-29	x86_64-windows GDB crash due to fs_base/gs_base registers	Pedro Alves	2	-4/+7
2018-06-06	Guard declarations of 'sve_{vq,vl}_from_{vl,vq}' macros on Aarch64 (and unbre...	Sergio Durigan Junior	1	-0/+4
2018-06-04	Use uint64_t for SVE VQ	Alan Hayward	2	-2/+2
2018-06-01	Add SVE register defines	Alan Hayward	1	-1/+14
2018-05-31	Function for reading the Aarch64 SVE vector length	Alan Hayward	1	-0/+17
2018-05-31	Add Aarch64 SVE target description	Alan Hayward	2	-4/+16
2018-05-22	[PowerPC] Recognize isa205 in linux core files	Pedro Franco de Carvalho	2	-2/+2
2018-05-22	[PowerPC] Consolidate linux vector regset sizes	Pedro Franco de Carvalho	1	-0/+9
2018-05-22	[PowerPC] Consolidate linux target description selection	Pedro Franco de Carvalho	3	-0/+178
2018-05-04	Fix "fall through" comments	Tom Tromey	1	-1/+2
2018-02-27	Explicitly specify common tdesc.h for use with aarch64.h	Alan Hayward	1	-1/+1
2018-02-26	Move arch/tdesc.h to common/tdesc.h	Alan Hayward	5	-99/+4
2018-02-21	Add "common-defs.h" include to files in arch/ subdir not yet including it.	John Baldwin	3	-1/+3
2018-01-02	Update copyright year range in all GDB files	Joel Brobecker	18	-18/+18
2017-12-05	Split tdesc_type into multiple classes	Simon Marchi	1	-11/+14
2017-11-24	Use flexible target descriptors for aarch64	Alan Hayward	1	-3/+15
2017-11-24	Add aarch64_create_target_description	Alan Hayward	2	-0/+34
2017-11-24	Change tic6x target descriptions	Yao Qi	2	-0/+73
2017-10-25	Add common AARCH64 REGNUM defines	Alan Hayward	1	-0/+47
2017-09-05	Convert the rest x86 target descriptions	Yao Qi	4	-9/+15
2017-09-05	Convert amd64-linux target descriptions	Yao Qi	2	-0/+92
2017-09-05	Share i386-linux target description between GDB and GDBserver	Yao Qi	3	-0/+97
2017-09-05	Dynamically composite xml in reply to GDB	Yao Qi	1	-1/+3
2017-09-05	[GDBserver] Centralize tdesc for i386-linux	Yao Qi	1	-0/+80
2017-05-02	Change return type of gdbarch_software_single_step to vector<CORE_ADDR>	Simon Marchi	2	-48/+46
2017-03-27	gdb: gdbserver: xtensa: make C0_NREGS available	Max Filippov	1	-0/+2
2017-01-01	update copyright year range in GDB files	Joel Brobecker	9	-9/+9
2016-10-10	Share enum arm_breakpoint_kinds	Yao Qi	1	-0/+8
2016-04-20	Move ARM_CPSR_GREGNUM to arch/arm-linux.h	Yao Qi	1	-0/+3
2016-02-16	Remove PC from syscall_next_pc	Yao Qi	2	-3/+3
2016-02-12	[ARM] Software single step cross kernel helpers	Yao Qi	1	-4/+66
2016-02-12	[ARM] Fixup PC in software single step	Yao Qi	4	-0/+39
2016-01-26	Remove argument pc in get_next_pcs	Yao Qi	2	-13/+14
2016-01-14	[ARM] Make thumb2_breakpoint static again	Yao Qi	2	-6/+7
2016-01-13	Read instruction with byte_order_for_code	Yao Qi	1	-1/+2
2016-01-06	Make {arm,thumb}_get_next_pcs_raw static	Yao Qi	2	-38/+28
2016-01-01	GDB copyright headers update after running GDB's copyright.py script.	Joel Brobecker	9	-9/+9