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AgeCommit message (Expand)AuthorFilesLines
2019-01-25Normalize includes to use common/Tom Tromey9-15/+15
2019-01-01gdb/riscv: Split ISA and ABI featuresAndrew Burgess1-13/+2
2019-01-01Update copyright year range in all GDB files.Joel Brobecker22-22/+22
2018-11-30gdb/riscv: Create each unique target description only onceAndrew Burgess2-0/+40
2018-11-30gdb/riscv: Add equality operators to riscv_gdb_featuresAndrew Burgess1-0/+13
2018-11-30gdb/riscv: Make some target description functions constantAndrew Burgess2-2/+2
2018-11-21gdb/riscv: Add target description supportAndrew Burgess2-0/+133
2018-10-26[PowerPC] Add support for HTM registersEdjunior Barbosa Machado3-2/+17
2018-10-26[PowerPC] Add support for EBB and PMU registersEdjunior Barbosa Machado1-0/+2
2018-10-26[PowerPC] Add support for TAREdjunior Barbosa Machado3-2/+9
2018-10-26[PowerPC] Add support for PPR and DSCREdjunior Barbosa Machado3-2/+10
2018-10-26[PowerPC] Fix indentation in arch/ppc-linux-common.cPedro Franco de Carvalho1-12/+12
2018-10-04Simple -Wshadow=local fixesTom Tromey1-4/+4
2018-10-01Aarch64: Move pseudo defines to headerAlan Hayward1-0/+8
2018-08-27Use CORE_ADDR_MAX in various "breaks" arraysTom Tromey1-2/+2
2018-08-22Aarch64 SVE VG is Vector GranuleAlan Hayward1-2/+2
2018-06-29x86_64-windows GDB crash due to fs_base/gs_base registersPedro Alves2-4/+7
2018-06-06Guard declarations of 'sve_{vq,vl}_from_{vl,vq}' macros on Aarch64 (and unbre...Sergio Durigan Junior1-0/+4
2018-06-04Use uint64_t for SVE VQAlan Hayward2-2/+2
2018-06-01Add SVE register definesAlan Hayward1-1/+14
2018-05-31Function for reading the Aarch64 SVE vector lengthAlan Hayward1-0/+17
2018-05-31Add Aarch64 SVE target descriptionAlan Hayward2-4/+16
2018-05-22[PowerPC] Recognize isa205 in linux core filesPedro Franco de Carvalho2-2/+2
2018-05-22[PowerPC] Consolidate linux vector regset sizesPedro Franco de Carvalho1-0/+9
2018-05-22[PowerPC] Consolidate linux target description selectionPedro Franco de Carvalho3-0/+178
2018-05-04Fix "fall through" commentsTom Tromey1-1/+2
2018-02-27Explicitly specify common tdesc.h for use with aarch64.hAlan Hayward1-1/+1
2018-02-26Move arch/tdesc.h to common/tdesc.hAlan Hayward5-99/+4
2018-02-21Add "common-defs.h" include to files in arch/ subdir not yet including it.John Baldwin3-1/+3
2018-01-02Update copyright year range in all GDB filesJoel Brobecker18-18/+18
2017-12-05Split tdesc_type into multiple classesSimon Marchi1-11/+14
2017-11-24Use flexible target descriptors for aarch64Alan Hayward1-3/+15
2017-11-24Add aarch64_create_target_descriptionAlan Hayward2-0/+34
2017-11-24Change tic6x target descriptionsYao Qi2-0/+73
2017-10-25Add common AARCH64 REGNUM definesAlan Hayward1-0/+47
2017-09-05Convert the rest x86 target descriptionsYao Qi4-9/+15
2017-09-05Convert amd64-linux target descriptionsYao Qi2-0/+92
2017-09-05Share i386-linux target description between GDB and GDBserverYao Qi3-0/+97
2017-09-05Dynamically composite xml in reply to GDBYao Qi1-1/+3
2017-09-05[GDBserver] Centralize tdesc for i386-linuxYao Qi1-0/+80
2017-05-02Change return type of gdbarch_software_single_step to vector<CORE_ADDR>Simon Marchi2-48/+46
2017-03-27gdb: gdbserver: xtensa: make C0_NREGS availableMax Filippov1-0/+2
2017-01-01update copyright year range in GDB filesJoel Brobecker9-9/+9
2016-10-10Share enum arm_breakpoint_kindsYao Qi1-0/+8
2016-04-20Move ARM_CPSR_GREGNUM to arch/arm-linux.hYao Qi1-0/+3
2016-02-16Remove PC from syscall_next_pcYao Qi2-3/+3
2016-02-12[ARM] Software single step cross kernel helpersYao Qi1-4/+66
2016-02-12[ARM] Fixup PC in software single stepYao Qi4-0/+39
2016-01-26Remove argument pc in get_next_pcsYao Qi2-13/+14
2016-01-14[ARM] Make thumb2_breakpoint static againYao Qi2-6/+7
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