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2024-12-09LoongArch: Assign DWARF register numbers to register aliasesLulu Cai4-17/+780
2024-12-05Support Intel AVX10.2 satcvt instructionsHu, Lin114-0/+2416
2024-12-05x86: Eliminate unnecessary {evex} prefixesH.J. Lu6-0/+86
2024-12-03gas: Re-enable .org test 1 on all targets except kvxJens Remus1-1/+1
2024-12-03s390: Enable .bss/.struct data allocation directives testsJens Remus2-2/+2
2024-12-03PowerPC: Add support for RFC02680 - PQC Acceleration InstructionsSurya Kumari Jangala2-0/+20
2024-12-03gas: partly restore how current_location() had workedJan Beulich6-14/+27
2024-12-03MMIX: use current_location() directlyJan Beulich2-16/+3
2024-12-03gas: streamline expr_build_dot()Jan Beulich1-11/+18
2024-12-03Support Intel AVX10.2 BF16 instructionsKong Lingling14-0/+2323
2024-12-02x86: default to not accepting MPX insnsJan Beulich28-30/+36
2024-12-02x86: always set ISA_1_BASELINE property for 64-bit objectsJan Beulich2-3/+4
2024-12-02x86/COFF: support section-index relocations in insn operandsJan Beulich6-2/+63
2024-12-02x86/COFF: support RVA (image-relative) relocations in insn operandsJan Beulich7-2/+154
2024-12-02RISC-V: Add support for ssdbltrp and smdbltrp extension.Dongyan Chen4-2/+9
2024-11-29s390: Simplify parsing of omitted index register operandJens Remus1-16/+8
2024-11-29s390: Treat addressing operand sequence as one in disassemblerJens Remus1-1/+1
2024-11-29s390: Treat addressing operand sequence as one in assemblerJens Remus1-14/+34
2024-11-29s390: Fix disassembly of optional addressing operandsJens Remus2-8/+84
2024-11-29x86: restrict gas'es recognition of -s to SolarisJan Beulich1-3/+8
2024-11-29x86/Solaris: support Sun form of CMOVccJan Beulich4-0/+80
2024-11-29x86: purge most *avx512*ig*-intel testsJan Beulich24-6996/+4
2024-11-27Re: nios2: Remove binutils support for Nios II targetAlan Modra1-2/+0
2024-11-26nios2: Remove binutils support for Nios II target.Sandra Loosemore233-11682/+3
2024-11-25Updated Bulgarian, Romanian and French translations for various sub-directori...Nick Clifton1-4192/+3762
2024-11-22RISC-V: Support SiFive extensions: xsfvqmaccdod, xsfvqmaccqoq and xsfvfnrclip...Nelson Chu7-2/+59
2024-11-20PowerPC: Add support for RFC02677 - VSX Vector Rotate Left WordPeter Bergner2-0/+2
2024-11-20arm: Support pac_key_* register operand for MRS/MSR in Armv8.1-M MainlineAndre Vieira3-1/+231
2024-11-20RISC-V: Add Zcmt instructions and csr.Jiawei14-0/+93
2024-11-19Support x86 Intel MSR_IMMHu, Lin112-11/+145
2024-11-18x86: rename SPACE_{,E}VEX_MAP<N>Jan Beulich1-21/+21
2024-11-18x86: VP2INTERSECT{D,Q} have mask register destination groupJan Beulich16-244/+293
2024-11-18x86: generalize "implicit quad group" handlingJan Beulich6-33/+67
2024-11-18gas: move had_errors() invocation in finishing of subsegsJan Beulich1-6/+6
2024-11-18ELF: SHF_STRINGS isn't really tied to SHF_MERGEJan Beulich3-23/+28
2024-11-18ELF: SHF_MERGE vs SHT_NOBITSJan Beulich1-0/+3
2024-11-18gas/ELF: also reject merge entity size being zeroJan Beulich1-1/+1
2024-11-18s390: Add arch15 Concurrent-Functions Facility insnsJens Remus2-0/+8
2024-11-13gas: add .cv_ucomp and .cv_scomp pseudo-directivesMark Harmstone8-1/+356
2024-11-08aarch64: testsuite: remove hard-coded instruction addressesMatthieu Longo1-26/+26
2024-11-08aarch64: remove redundant register type R_NMatthieu Longo1-5/+1
2024-11-08aarch64: constify unchanged char* argumentsMatthieu Longo1-1/+1
2024-11-08arm, objdump: print obsolote warning when 26-bit set in instructionsAndre Vieira5-76/+36
2024-11-08arm, objdump: Make objdump use bfd's machine detection to drive disassemblyAndre Vieira4-17/+19
2024-11-07arm: Skip two failing tests for wince & pe targetsAndre Simoes Dias Vieira2-0/+2
2024-11-06PowerPC: Merge rfc2655 and rfc2656 test cases into one future test casePeter Bergner5-32/+18
2024-10-31gas/doc/riscv: Fixed misaligned instruction tableNelson Chu1-42/+42
2024-10-30x86: add a helper to copy insn operand infoJan Beulich1-133/+44
2024-10-30x86/APX: support JMPABS also in assemblerJan Beulich5-8/+51
2024-10-30x86/APX: squash REX prefix when REX2 is being emittedJan Beulich3-1/+13